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Soft error rate (SER) reduction in advanced silicon processes

A substrate, conductive contact technology, applied in the field of semiconductor devices and their manufacturing, can solve problems such as unsatisfactory

Active Publication Date: 2015-04-01
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] Thus, while existing methods of soft error rate reduction for semiconductor devices are generally adequate for their intended purpose, they are not entirely satisfactory in every respect.

Method used

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  • Soft error rate (SER) reduction in advanced silicon processes
  • Soft error rate (SER) reduction in advanced silicon processes
  • Soft error rate (SER) reduction in advanced silicon processes

Examples

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Embodiment Construction

[0033] It should be understood that the following invention provides a number of different embodiments or examples for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are examples only and are not intended to be limiting. Also, in the following description, the formation of a first part on or over a second part may include an embodiment in which the first and second parts are formed in direct contact, and may also include an embodiment in which the first and second parts may be interposed between the first and second parts. Embodiments in which additional components are formed such that the first and second components may not be in direct contact. Various components may be arbitrarily drawn in different sizes for simplicity and clarity.

[0034] figure 1 is a flowchart illustrating a method 10 for synthesizing a purified B-11 isotope gas in accordance ...

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Abstract

Provided is a method of fabricating a semiconductor device. The method includes providing a substrate. The method includes forming a portion of an interconnect structure over the substrate. The portion of the interconnect structure has an opening. The method includes obtaining a boron-containing gas that is free of a boron-10 isotope. The method includes filling the opening with a conductive material to form a contact. The filling of the opening is carried out using the boron-containing gas. Also provided is a semiconductor device. The semiconductor device includes a substrate. The semiconductor device includes an interconnect structure formed over the substrate. The semiconductor device includes a conductive contact formed in the interconnect structure. The conductive contact has a material composition that includes Tungsten and Boron, wherein the Boron is a 11B-enriched Boron.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to Provisional Application Serial No. 61 / 370,671, filed August 4, 2010, entitled "SOFT ERROR RATE (SER) REDUCTION IN ADVANED SILICON PROCES SES," the entire contents of which are hereby incorporated by reference Reference. technical field [0003] The present invention generally relates to the field of semiconductors, and more particularly, to semiconductor devices and methods of manufacturing the same. Background technique [0004] The semiconductor integrated circuit (IC) industry has experienced rapid development. Technological advances in IC materials and design have produced multiple generations of ICs, where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of handling and manufacturing ICs. During the evolution of integrated circuits, functional density (ie, the number of interconnected dev...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L23/532
Inventor 李永辉蔡超杰吴佳芳李正中曲维正桂东
Owner TAIWAN SEMICON MFG CO LTD