A video image cache processing method and device

A video image and cache technology, applied in the direction of image communication, digital video signal modification, electrical components, etc., can solve the problems of increasing the area of ​​​​the integrated circuit, increasing the hit time, and the hit time is long, so as to reduce the cache miss rate and improve the The effect of overall performance and high missing rate

Active Publication Date: 2017-11-14
TSINGHUA UNIV
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Problems solved by technology

[0007] The missing rate can be reduced by increasing the block capacity, but the missing cost will be increased
The cache size can be increased to reduce the miss rate, but at the expense of longer hit times and higher cost and power consumption
You can also increase the associativity to reduce the miss rate, but a larger associativity will also increase the hit time
It is also possible to use a multi-level cache to reduce the miss rate, but it will lead to an increase in the area of ​​the integrated circuit and increase the maintenance of multi-level cache coherence
[0008] It can be seen that the above optimization methods are all general methods, not for the characteristics of video images, and the optimization effect obtained in video image processing is not obvious

Method used

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  • A video image cache processing method and device

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Experimental program
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Embodiment 1

[0053] figure 1 It is a flow chart of the steps of the video image cache processing method in this embodiment. The following combination figure 1 Explain in detail.

[0054]Step S101 is a preprocessing step, dividing the video image into several two-dimensional pixel blocks, and separating the luminance information and chrominance information of each pixel in the video image.

[0055] Since the human eye is sensitive to the luminance in the video image but not to the chrominance part, the luminance information and chrominance information of each pixel in the video image can be separated. The chrominance information therein is processed imprecisely through subsequent processing steps.

[0056] figure 2 It is an example diagram of dividing a video image into two-dimensional pixel blocks in this embodiment. A video image 201 including a plurality of pixels is sequentially divided into a plurality of pixel blocks 202, wherein the pixel block 202 includes 4 pixels and is dist...

Embodiment 2

[0086] image 3 A schematic structural diagram of the video image cache processing apparatus 300 according to this embodiment is shown. The video image cache processing device 300 includes a preprocessing unit 301 , an address conversion unit 302 , a chroma reading unit 303 and a brightness reading unit 304 . Among them, the preprocessing unit 301 is used to divide the video image into several two-dimensional pixel blocks, and separate the luminance information and chrominance information of each pixel point in the video image; the address conversion unit 302 is used to divide each pixel in the two-dimensional pixel block The first address of the chromaticity information of the point in the main storage unit is converted into a second address; the chromaticity reading unit 303 is used to read the chromaticity information corresponding to the second address in the chromaticity buffer unit, and the two-dimensional pixel block Perform inaccurate processing as a pixel point; the ...

Embodiment 3

[0097] This embodiment describes the result of processing video images using the method of the present invention. The selected image samples are 5 QCIF and 5 CIF images, and the image format is 4:2:0 YUV color difference format. Using the method in Embodiment 1 of the present invention, wherein the size of the two-dimensional pixel block is 2×2 pixels, the test results are shown in Table 2.

[0098] Table 2 shows the PSNR (db) of the image after inaccurate processing. The average peak signal-to-noise ratio (PSNR) of the image is above 35dB, which meets the requirements of the human eye. Taking the QCIF image akiyo_qcif_ch.yuv as an example, the subjective rendering of the inaccurately processed image and the original image is given, such as Figure 5a with Figure 5b shown.

[0099] At the same time, in order to verify that the method is used in video processing, the method is selected to be applied to the H.264 system, and the imprecise processing is combined with the H.26...

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Abstract

The invention discloses a video image cache processing method and device. The method includes: a preprocessing step, dividing the video image into several two-dimensional pixel blocks, and separating the brightness information and chrominance information of each pixel point in the video image; The first address of the chromaticity information in the main storage unit is converted into a second address; the chromaticity reading step is to read the chromaticity information corresponding to the second address in the chromaticity buffer unit, and use the two-dimensional pixel block as a pixel point Perform imprecise processing. The present invention makes full use of the characteristic that the human eye has different sensitivities to the brightness and chroma of the video image, adopts an inaccurate processing method for the chrominance information in the video image, and applies this method in the cache memory of the processor, reducing the Cache miss rate.

Description

technical field [0001] The present invention relates to the technical field of video image processing, in particular to a processing method and device for video image cache. Background technique [0002] In the prior art, video images are widely used in fields such as communication, transportation, medicine, and education, such as video conferencing, video monitoring, and distance teaching. With the continuous expansion of video and image application fields, the amount of data processed by video is also increasing sharply, resulting in the common occurrence of the "storage wall" problem in computer processing systems, that is, the access speed of memory is much lower than the processing speed of processor. It is more serious in video image processing. [0003] In the field of computer engineering, the high-speed cache (cache) structure proposed according to the principle of locality is one of the main means to solve the "storage wall" problem, and has been widely used in pr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N19/85H04N19/186H04N19/146
Inventor 周妮乔飞江树浩杨华中
Owner TSINGHUA UNIV
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