Terminal device memory access control method and device

A technology for memory access control and terminal equipment, applied in the computer field to achieve the effect of debugging and optimization

Active Publication Date: 2016-03-30
SPREADTRUM COMM (SHANGHAI) CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] The problem to be solved by the present invention is that the existing technology cannot achieve a balance between performance

Method used

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  • Terminal device memory access control method and device
  • Terminal device memory access control method and device
  • Terminal device memory access control method and device

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Embodiment Construction

[0035] In order to make the above objects, features and advantages of the present invention more comprehensible, specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0036] As mentioned in the background technology, in order to improve memory access performance, the existing technology adopts a dual-channel memory access control strategy, but its applicable objects are generally limited to personal computers and other terminal devices that are not sensitive to power consumption. More sensitive end devices are not well suited.

[0037] Considering that terminal equipment has a variety of product application forms, and the product application form of terminal equipment can generally be reflected by the sensitivity of terminal equipment to power consumption and performance during application, for example: high sensitivity to power consumption, It indicates that the terminal equipment has low power consump...

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Abstract

A terminal device memory access control method and a device are provided; the memory comprises at least two access channels; the method comprises the following steps: using a second balance mode as a memory access mode to distribute access requests on various access channels; dividing whole memory storage space into second sub-storage rooms corresponding to each access channel according to a storage address scope under the second balance mode, and determining corresponding access modes through decoding addresses for extended addresses in the access requests; the access modes comprise a first access mode realizing non-intersect accessing in various second sub-storage rooms, and a second access mode realizing intersect accessing in a virtual access zone, wherein the access addresses in the virtual access zone are virtual storage addresses generated through intersecting mapping physical storage addresses in each second sub-storage room by using intersecting access size as unit. The method and device can improve performance and balance power consumption control so as to satisfy memory accessing needs of various applications on the terminal device.

Description

technical field [0001] The invention relates to the field of computers, in particular to a method and device for controlling memory access of terminal equipment. Background technique [0002] As the application of consumer electronic products becomes more and more abundant, the functions provided by the chip are also increasing, which also has very high requirements for the performance of the chip. The processing speed of the central processing unit (CPU, Central Processing Unit), and the number of other bus master control units (Master) similar to the CPU are also increasing, and the accesses issued by each master have higher and higher requirements for bandwidth. Memory is gradually becoming the bottleneck of efficiency. Especially for mobile communication terminal equipment (such as mobile phones), on the one hand, with the introduction of high-speed network standards such as Long Term Evolution (LTE, Long Term Evolution), the amount of network data is increasing; on the...

Claims

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Application Information

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IPC IPC(8): G06F13/18G06F12/08
CPCY02D10/00
Inventor 湛振波
Owner SPREADTRUM COMM (SHANGHAI) CO LTD
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