fpga-based system on chip and its object detection method

A system-on-chip, detection unit technology, applied in radio wave measurement systems, instruments, etc., can solve the problems of large calculation load, unstable detection performance, loss of sex-to-noise ratio, etc., and achieve the effect of reducing calculation time and calculation complexity.

Active Publication Date: 2019-03-29
XIDIAN UNIV +1
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AI Technical Summary

Problems solved by technology

[0003] Constant false alarm processing generally cannot improve the SNR, but will cause SNR loss. The smaller the number of reference units, the greater the fluctuation of the average estimate, and the noise fluctuation will increase the probability of false alarm. To maintain a constant false alarm Alarm probability, then the SNR of the output must be increased. The SNR loss that needs to be improved is called the false alarm loss.
[0004] The research found that the noise and clutter in the radar background exist simultaneously in the two-dimensional range and Doppler domains, and the local noise can be considered as a smooth Gaussian random process after removing outliers; two-dimensional plane, or combined sliding window processing on the range-Doppler two-dimensional plane, which utilizes information in two dimensions and is more conducive to target detection; and considering the effectiveness of hardware processing, the average constant False alarm (CA-CFAR) detector to achieve, CA-CFAR detector commonly used range-Doppler two-dimensional constant false alarm processing window selection methods include two, one is a rectangular window, the selected reference unit is relatively small The other is the cross window, the selected reference unit is insufficient, and the detection performance is unstable in the uniform clutter background

Method used

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  • fpga-based system on chip and its object detection method
  • fpga-based system on chip and its object detection method

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Embodiment 1

[0034]Signal detection is carried out in the interference background. In addition to system noise, the interference background also includes echo signals reflected by waves, clouds, rain, hills, buildings, forests, etc., artificial active and passive signals released by the enemy. Jamming (such as jammers and metal chaff), and adjacent jamming targets mixed with useful targets and its side lobes (such as radar using pulse compression); for maritime target detection, mainly ocean waves, sea floats These interferences hinder the radar from working and make it difficult to detect signals. In the signal detection, we pay special attention to the probability of a wrong judgment, that is, the change of the false alarm probability. The false alarm probability is one of the main technical indicators in the signal detection; Constant false alarm rate processing is carried out, so that the false alarm probability remains unchanged. In radar signal detection, constant false alarm rate d...

Embodiment 2

[0053] see figure 2 , is the schematic diagram of the rice window obtained by using the method of the present invention; it is used for two-dimensional constant false alarm detection target, wherein the realization of the two-dimensional constant false alarm detection target method is the same as that of embodiment 1, and the FPGA-based system on chip of the present invention proposes a A target detection method based on FPGA-based system-on-chip that can reduce hardware complexity and reduce detection time, comprising the following steps:

[0054] Step 1, the analog receiver obtains the analog signal, and converts the obtained analog signal into an I-channel analog signal and a Q-channel analog signal, and then sends the I-channel analog signal and the Q-channel analog signal to data acquisition and analog-to-digital conversion respectively module.

[0055] The data acquisition and analog-to-digital conversion module is a dual-channel high-speed analog-to-digital (AD) conve...

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Abstract

The invention discloses an object detection method of a system on chip based on FPGA. The method comprises the following steps: an analog receiver acquiring an analog signal and converting the acquired analog signal to an I-path analog signal and a Q-path analog signal, a data acquisition and analog-digital conversion module separately sampling the I-path analog signal and the Q-path analog signal, then conducting analog-digital conversion to obtain a digital complex signal, then transmitting a receiving identification to a state machine; a DDR2-SDRAM conducting cache on the digital complex signal; the state machine, based on the receiving identification, reading the cached digital complex signal from the DDR2-SDRAM, recording the coordinate of each data in a data matrix; a data processing module acquiring a window of the shape of the Chinese character mi, calculating the mean value of reference data of the data matrix so as to determine the object in the data matrix and the position coordinate of the object, at the same time acquiring data calculation completion identification, and transmitting the data calculation completion identification to the state machine, thus completing data processing.

Description

technical field [0001] The invention belongs to the technical field of radar target detection, and in particular relates to an FPGA-based upper system and a target detection method thereof, which are suitable for detection and tracking of targets in noise, clutter or interference environments. Background technique [0002] The echo signal received by the radar contains not only the target, but also various noises, clutter and interference signals. When a fixed threshold is used for detection, if the threshold is set high, missed detection may occur; if the threshold is set low, there will be Lots of false alarms. In order to improve the performance of radar, various clutter suppression measures are usually used in modern radar signal processing, such as moving target display MTI, moving target detection MTD; however, even if the above methods are adopted, clutter remains. When a large number of false targets are recruited, it is easy to overload the radar receiver, so it is...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01S7/41
CPCG01S7/414
Inventor 陶海红周忠锦张倩王建声
Owner XIDIAN UNIV
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