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Memory device and method of operation thereof

A technology for memory devices and memory cells, applied in the semiconductor field, can solve problems such as programming crosstalk, and achieve the effects of preventing programming crosstalk, effective programming voltage, and providing transmission and programming efficiency.

Active Publication Date: 2020-07-17
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a memory device and its operating method to solve the problem of programming crosstalk in existing memory devices

Method used

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  • Memory device and method of operation thereof
  • Memory device and method of operation thereof

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Embodiment 1

[0044] This embodiment provides a storage device, such as figure 2 As shown, the storage device includes several storage units, such as figure 2 The first storage unit 31 and the second storage unit 32, wherein each storage unit includes a multi-row multi-column flash memory structure, specifically, as figure 2 As shown, each storage unit includes a flash memory structure with 4 rows and 4 columns, wherein, the two flash memory structures share the same control gate, and the flash memory structure of the first row and the flash memory structure of the second row in each storage unit share the same control gate, and each The flash memory structure of the third row and the flash memory structure of the fourth row in the storage unit share the same control gate. The storage device also includes a high-voltage decoder, a low-voltage decoder and an isolation module. The isolation module includes a plurality of isolation units, such as figure 2 As shown in , the multiple isolat...

Embodiment 2

[0056] The present invention also provides an operation method of a storage device, the operation method of the flash memory structure includes: a plurality of isolation units isolate the voltage between the high-voltage decoder and the low-voltage decoder; a control gate controls two flash memory structures; The high-voltage decoder provides an operating voltage for the flash memory structure connected to it; when programming a certain flash memory structure, the isolation unit connected to the flash memory structure is turned off, and the isolation unit that shares the same control gate with the flash memory structure The isolation unit connected to the flash memory structure is turned off, and the isolation unit connected to the flash memory structure in an adjacent row of the flash memory structure is turned on.

[0057] Further, when the first row and first column flash memory structure of the memory cell is programmed, the first control line TWL0 and the fourth control li...

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Abstract

The invention provides a storage device and an operation method thereof. The storage device comprises a plurality of storage units, wherein each storage unit comprises multiple rows and multiple columns of flash memory structures, the storage device further comprises a high voltage decoder, a low voltage decoder and an isolation module, the isolation module comprises a plurality of isolation units, wherein the plurality of isolation units are connected between the high voltage decoder and the low voltage decoder, each flash memory structure is connected to the connection site of the high voltage decoder and one isolation unit, two flash memory structures share one control grid, and the high voltage decoder provides an operation voltage for the flash memory structure connected with the high voltage decoder; when a certain flash memory structure is programmed, the isolation unit connected with the flash memory structure is turned off, the isolation unit connected with the flash memory structure sharing the same control grid with the flash memory structure is turned off, and the residual isolation units are turned on.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a storage device and an operation method thereof. Background technique [0002] Such as figure 1 As shown, in the existing memory device structure, a plurality of isolation transistors are connected between the high-voltage decoder 10' and the low-voltage decoder 20', when the high-voltage decoder 10' outputs voltage, the flash memory structure in the memory device When 30' is programmed, both the first isolation transistor 41' and the second isolation transistor 42' are turned off, and since the third isolation transistor 43' and the second isolation transistor 42' share a control line, they are also turned off. The control gate of the second isolation transistor 42' is applied with a voltage of 2V, and the floating gate is applied with 0V to make the programming of the flash memory structure 30' effective. Failure to turn off completely causes the 5V voltage at the dra...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/10G11C16/12G11C16/34
CPCG11C16/10G11C16/12G11C16/3427
Inventor 杨光军高超胡剑
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP