Apparatus and method for parallelized successive cancellation decoding and successive cancellation list decoding

A device and decoder technology, applied in the direction of using linear codes for error correction/detection, using block codes for error correction/detection, encoding, etc., can solve problems such as increased computational complexity

Active Publication Date: 2018-03-27
SAMSUNG ELECTRONICS CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, for list size L, list decoding of polar codes has a computational complexity of about O(LNlogN), which increases by a factor of L

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  • Apparatus and method for parallelized successive cancellation decoding and successive cancellation list decoding
  • Apparatus and method for parallelized successive cancellation decoding and successive cancellation list decoding
  • Apparatus and method for parallelized successive cancellation decoding and successive cancellation list decoding

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Embodiment Construction

[0024] Hereinafter, embodiments of the present disclosure are described in detail with reference to the accompanying drawings. It should be noted that the same elements will be designated by the same reference numerals even though they are shown in different drawings. In the following description, only specific details and components such as detailed configurations and components are provided to help a comprehensive understanding of the embodiments of the present disclosure. Accordingly, it will be apparent to those skilled in the art that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the disclosure. Also, descriptions of well-known functions and constructions are omitted for clarity and conciseness. Terms described below are terms defined in consideration of functions of the present disclosure, and may vary according to users, user's intentions, or habits. Therefore, definitions of terms shou...

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Abstract

Apparatus and method for parallelized successive cancellation decoding and successive cancellation list decoding are provided. The apparatus includes a receiver to receive a polar codeword of length mj; a processor configured to determine a decoding node tree structure with mj leaf nodes for the received codeword, and receive i indicating a level at which parallelism of order m is applied to the decoding node tree structure, wherein i indicates levels of the decoding node tree structure, and wherein the mj leaf nodes are at level j; and m successive cancellation list decoders (SCLDs) applied to each child node of each node in the decoding node tree structure at level i-1, wherein each of the m SCLDs executes in parallel to determine log likelihood ratios (LLRs) for a codeword of length mj-i, and wherein each of the m SCLDs uses LLRs of an associated parent node without using a hard decision or a soft reliability estimate of any other node of the other m SCLDs.

Description

[0001] This application claims U.S. Provisional Patent Application filed in the USPTO on September 20, 2016, assigned serial number 62 / 397,053 and filed in the USPTO on January 4, 2017, assigned serial number Priority to US Nonprovisional Patent Application 15 / 398,378, which is hereby incorporated by reference in its entirety. technical field [0002] The present disclosure generally relates to a device and method for continuous cancellation decoding and continuous cancellation list decoding of polar codes, and more particularly, to a device and method for parallel continuous cancellation decoding and continuous cancellation list decoding of polar codes. Background technique [0003] Polar codes are capacity-enabling codes that have received a lot of attention recently and are considered to be specifications for channel codes in fifth generation (5G) communication systems. Polar codes can also be considered error correcting codes in memory systems. [0004] Polar codes are ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L1/00H03M13/13H03M13/09
CPCH03M13/091H03M13/13H04L1/0045H04L1/0052H04L1/0054H04L1/0057H04L1/0061H03M13/6561G06F30/398H03M13/451H03M13/09H01L22/10H03M13/3961
Inventor 穆斯塔法·艾尔可哈米林宪平李正元
Owner SAMSUNG ELECTRONICS CO LTD
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