Interrupt processing function verification system and method

A technology of functional verification and verification system, which is applied in the field of interrupt processing function verification system, can solve the problems of long time, increase of missing errors, poor reusability of verification system, etc., and achieve high efficiency, strong completeness, versatility and reliability Transplantation effect

Active Publication Date: 2018-12-11
LOONGSON TECH CORP
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The verification of the interrupt controller first needs to generate an interrupt trigger, but some interrupt triggers take a long time to occur, and are even difficult to occur
This will not only waste a lot of simulation time and hardware resources, but also make it difficult to generate a large-scale interrupt input to verify the interrupt controller, resulting in insufficient verification of the interrupt controller, thereby increasing the probability of missing errors in the verification process
[0004] In the existing verification method of analog interrupt input, software is used to configure the control register in the interrupt controller and input the interrupt source, the randomness of configuration and interrupt source cannot be guaranteed, and the verification efficiency is low. At the same time, the entire verification system can be reused sex is also poor

Method used

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  • Interrupt processing function verification system and method
  • Interrupt processing function verification system and method
  • Interrupt processing function verification system and method

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Experimental program
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Embodiment 1

[0049] An interrupt processing function verification system provided by an embodiment of the present invention is introduced in detail.

[0050] refer to figure 1 , shows a schematic diagram of an interrupt handling function verification system in an embodiment of the present invention. The system includes:

[0051] A sequence generator 101, configured to generate interrupt data, where the interrupt data includes configuration values ​​or interrupt sources of the interrupt processor;

[0052] a driver 102, configured to convert the interrupt data into an interrupt input signal, and send the interrupt input signal to an interrupt processor;

[0053] The interrupt processor 103 is configured to configure the interrupt processor when the received interrupt input signal is a configuration value of the interrupt processor; when the received interrupt input signal is an interrupt source, configure the interrupt The source performs interrupt processing to generate an interrupt res...

Embodiment 2

[0075] refer to image 3 , shows a schematic diagram of an interrupt handling function verification system in an embodiment of the present invention. This embodiment is based on the first embodiment.

[0076] The interrupt responder 1033 is further configured to generate first bus protocol data and send the generated first bus protocol data to the scoreboard 104, wherein the first bus protocol data includes the interrupt controller The channel information of the write address channel and the write data channel;

[0077] The interrupt controller 1031 is further configured to generate second bus protocol data, wherein the second bus protocol data includes channel information of the write address channel and the write data channel;

[0078] A bus protocol monitor 1034, configured to monitor the second bus protocol data generated by the interrupt controller 1031, and send the second bus protocol data to the scoreboard 104;

[0079] The scoreboard 104 is further configured to ve...

Embodiment 3

[0087] A method for verifying an interrupt processing function provided by an embodiment of the present invention is introduced in detail.

[0088] refer to Figure 4 , which shows a flow chart of the steps of a method for verifying an interrupt processing function in an embodiment of the present invention, which is applied to the system for verifying the interrupt processing function described in Embodiment 1 to Embodiment 2, and the method includes:

[0089] Step 201, generate interrupt data, wherein the interrupt data includes configuration values ​​of interrupt processors or interrupt sources.

[0090] In this embodiment, the interrupt data is generated by the sequence generator 101 in the verification system, and the interrupt data includes configuration values ​​write_valid, write_addr, write_data or interrupt source ioint of the interrupt handler. The sequence generator 101 can randomly generate a large number of input stimuli in a short period of time according to the s...

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Abstract

The present invention provides an interrupt processing function verification system and method. The verification system includes a sequence generator for generating interrupt data which includes a configuration value or an interrupt source of an interrupt processor, a driver for converting the interrupt data into an interrupt input signal and sending the interrupt input signal to the interrupt processor, the interrupt processor which is used for setting the interrupt processor when the received interrupt input signal is a configuration value of the interrupt processor, carrying out interrupt processing on the interrupt source to generate an interrupt response and a reference response when the received interrupt input signal is the interrupt source, and sending the interrupt response and the reference response to a scoreboard, and the scoreboard for verifying an interrupt processing function by comparing the interrupt response with the reference response. In the embodiment of the invention, a verification environment has high efficiency, and completeness, automation and reusability are high.

Description

technical field [0001] The invention relates to the field of system-level chips, in particular to an interrupt processing function verification system and method. Background technique [0002] The interrupt controller is an important module of the SOC (System on Chip, system-on-chip). The interrupt sources of hardware interrupts, software interrupts, and external interrupts must pass through the interrupt controller to be processed by the corresponding processor core in the SOC. [0003] The verification of the interrupt controller first needs to generate an interrupt trigger, but some interrupt triggers take a long time to happen, or even difficult to happen. This will not only waste a lot of simulation time and hardware resources, but also make it difficult to generate a large-scale interrupt input to verify the interrupt controller, resulting in insufficient verification of the interrupt controller, thereby increasing the probability of missing errors in the verification ...

Claims

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Application Information

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Patent Type & AuthorityApplications(China)
IPC IPC(8): G06F11/22G06F11/26G06F11/263
CPCG06F11/2231G06F11/26G06F11/263Y02D10/00
Inventor卢颖王朋宇
OwnerLOONGSON TECH CORP