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Semiconductor device and method for manufacturing same

A semiconductor and main body technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve problems such as degradation of operating characteristics of semiconductor devices

Pending Publication Date: 2019-06-04
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Scaling of MOSFETs degrades operating characteristics of semiconductor devices

Method used

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  • Semiconductor device and method for manufacturing same
  • Semiconductor device and method for manufacturing same
  • Semiconductor device and method for manufacturing same

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0022] Hereinafter, some embodiments will be described in detail with reference to the accompanying drawings to help clearly understand the inventive concept.

[0023] figure 1 A plan view illustrating a semiconductor device according to an exemplary embodiment is shown. figure 2 shows along the figure 1 Cross-sectional views taken along line II', line II-II' and line II-III' of . image 3 shows show figure 1 Perspective view of the gate structure.

[0024] refer to Figure 1 to Figure 3 , the substrate 100 may be provided thereon with a device isolation layer ST defining an active pattern ACT. The substrate 100 may be a silicon substrate, a germanium substrate, or a silicon-on-insulator (SOI) substrate, or may include a silicon substrate, a germanium substrate, or a silicon-on-insulator (SOI) substrate. The device isolation layer ST may include, for example, oxide, nitride or oxynitride. The active pattern ACT may extend in a direction D1 parallel to the top surface o...

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PUM

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Abstract

Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a gate electrode on a substrate, an upper capping pattern on the gate electrode, and a lower capping pattern between the gate electrode and the upper capping pattern. The lower capping pattern comprises a first portion between the gate electrode and the upper capping pattern, and a plurality of second portions extending from the first portion onto corresponding side surfaces of the upper capping pattern. The upper capping pattern covers a topmost surface of each of the second portions.

Description

[0001] This application claims the benefit of Korean Patent Application No. 10-2017-016937 filed with the Korean Intellectual Property Office on November 29, 2017, the entire contents of which are hereby incorporated by reference. technical field [0002] The present disclosure relates to semiconductor devices, and more particularly, to semiconductor devices including field effect transistors and methods of manufacturing the same. Background technique [0003] Semiconductor devices include integrated circuits made up of metal oxide semiconductor field effect transistors (MOSFETs). As the size and design rules of semiconductor devices are gradually reduced, the size of MOSFETs is also gradually reduced. The scaling of MOSFETs degrades the operating characteristics of semiconductor devices. Accordingly, various studies are being conducted to manufacture semiconductor devices having excellent performance while overcoming limitations due to integration of semiconductor devices....

Claims

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Application Information

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IPC IPC(8): H01L29/423H01L29/78H01L21/336
CPCH01L21/823475H01L21/823437H01L27/088H01L29/66545H01L21/76897H01L21/76834H01L29/78H01L29/66045H01L21/8234H01L21/76838H01L29/42364H01L29/518H01L21/28247
Inventor 李钟汉金完敦宋在烈任廷爀丁炯硕
Owner SAMSUNG ELECTRONICS CO LTD
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