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System on chip, equipment and communication system

A system-on-chip and data packet technology, applied in the circuit field, can solve the problems of poor scalability, long development cycle and high risk, and achieve the effect of improving scalability, reducing design cycle and cost

Active Publication Date: 2019-10-25
GOWIN SEMICON CORP LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, the main method is to use a dedicated chip embedded with the USB Type-C PD protocol to implement the USB T

Method used

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  • System on chip, equipment and communication system
  • System on chip, equipment and communication system
  • System on chip, equipment and communication system

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Embodiment Construction

[0027] Certain terms are used throughout the specification and claims to refer to specific components. As can be understood by those skilled in the art, electronic device manufacturers may refer to the same component by different names. This article does not distinguish components by name, but by function. In the following description and claims, the word "comprising" is an open-ended restrictive word, so it should be interpreted as meaning "including but not limited to...". Additionally, the term "coupled" is intended to mean either an indirect electrical connection or a direct electrical connection. Thus, when one device couples to another device, that connection may be a direct electrical connection or an indirect electrical connection through other devices and connections.

[0028] Such as figure 1 Shown is a schematic structural diagram of the system on chip according to the first embodiment of the present invention. The SoC 100 includes a Microcontroller Unit (Microc...

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Abstract

The invention provides a system on chip. The system on chip comprises a field programmable gate array which is used for receiving a first protocol data packet from the outside and decoding the first protocol data packet to obtain a first physical layer data packet; a micro-control unit which is used for receiving the first physical layer data packet from the field-programmable gate array through aprotocol data link and carrying out protocol data processing on the first physical layer data packet to obtain a second physical layer data packet; wherein the second physical layer data packet is transmitted to the field-programmable gate array through the protocol data link, and the field-programmable gate array is further used for encoding the second physical layer data packet to obtain a second protocol data packet and sending the second protocol data packet to the outside. The invention also provides corresponding equipment and a communication system. According to the invention, the design period and cost of the implementation protocol are reduced, and the expandability is improved.

Description

technical field [0001] The disclosed embodiments of the present invention relate to the field of circuit technology, and more specifically, relate to a system and device on a chip, and a communication system. Background technique [0002] In order to solve the disadvantages of inconsistent physical interface specifications of the Universal Serial Bus (USB), unfriendly use, and one-way transmission of power, the USB Standardization Organization has proposed a USB Type-C interface specification that is thin and light, with a positive and negative bidirectional plug. Higher data transmission speed, higher output power. In order to cooperate with the power management of the USB Type-C interface, the USB standardization organization proposed the USB Power Delivery (PD) protocol, which is a high-power USB power supply extension standard for power supply and reception. [0003] At present, the main method is to use a dedicated chip embedded with the USB Type-C PD protocol to imple...

Claims

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Application Information

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IPC IPC(8): H04L29/06H04L1/00
CPCH04L1/004H04L69/03H04L69/22
Inventor 刘锴崔明章王铜铜徐庆嵩杜金凤
Owner GOWIN SEMICON CORP LTD