Electric leakage analysis method of three-dimensional memory, and three-dimensional memory
A memory, three-dimensional technology, applied in circuits, electrical components, electric solid-state devices, etc., can solve the problems of difficulty in ensuring the quality of three-dimensional memory, low analysis accuracy, and reduced product yield, so as to speed up process development and shorten analysis time. , the effect of reducing the cost of analysis
Active Publication Date: 2021-01-29
YANGTZE MEMORY TECH CO LTD
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Problems solved by technology
When forming a contact hole, in order to ensure that the gate layer in the lower step relatively close to the substrate can be drawn out smoothly, the gate layer in the upper step relatively far away from the substrate is easily over etched, resulting in etching through (punchthrough), resulting in a short circuit between two adjacent gate layers through a conductive plug, reducing product yield
[0004] In the prior art, the accuracy of the analysis of the contact hole where the etching punch-through occurs is low, and it is difficult to guarantee the quality of the fabricated three-dimensional memory
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[0055] The technical solution of the present disclosure will be further elaborated below in conjunction with the drawings and embodiments. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.
[0056] In the following paragraphs the invention is described more specifically by way of example with reference to the accompanying drawings. The advantages and features of the present disclosure will be more apparent from the following description and claims. It should be noted that all the drawings are in very simplified form and use inaccurate scales, which are only used to facilitate and clearly assist the purpose of illustrat...
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The embodiment of the invention discloses an electric leakage analysis method of a three-dimensional memory, and the three-dimensional memory. The three-dimensional memory comprises a gate stack structure, the gate stack structure comprises insulating layers which are alternately stacked in sequence and a conductive gate layer. The method comprises the following steps: in a first step region of the gate stack structure, forming an insulating barrier structure penetrating through the gate layer on the upper surface of the step, wherein the gate layer on the upper surface of the step comprises afirst part and a second part, and the barrier structure electrically isolates the first part from the second part; forming a first conductive plug electrically connected with the first part; forminga second conductive plug electrically connected with the second part, wherein the second conductive plug is used for transmitting an electric signal to the gate layer; performing electrical detectionon the first conductive plug to obtain a detection result; and performing electric leakage analysis on the three-dimensional memory based on the image presented by the first conductive plug in the detection result.
Description
technical field [0001] Embodiments of the present disclosure relate to the field of semiconductor technologies, and in particular, to a leakage analysis method of a three-dimensional memory and a three-dimensional memory. Background technique [0002] The storage structure of the three-dimensional memory includes stacked conductive gate layers arranged at intervals, and adjacent gate layers are separated by an insulating layer. The storage structure includes a core (core) area and a step (Stair Steps, SS) area. The step area is arranged around the core area, and is used to transmit control information to the core area, so as to realize reading and writing of information in the core area. A contact hole is generally provided in the stepped area, and a conductive material is filled in the contact hole to form a conductive plug (Contact). One end of the conductive plug is electrically connected to the gate layer, and the other end is electrically connected to the rear interco...
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IPC IPC(8): H01L27/11519H01L27/11524H01L27/11551H01L27/11565H01L27/1157H01L27/11578G01R31/52H10B41/10H10B41/20H10B41/35H10B43/10H10B43/20H10B43/35
CPCG01R31/52H10B41/10H10B41/35H10B41/20H10B43/35H10B43/10H10B43/20
Inventor 范光龙陈金星刘丽君马霏霏
Owner YANGTZE MEMORY TECH CO LTD