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Memory device and method for assiting read operation in memory device

A reading operation and memory technology, which is applied in the direction of conversion equipment, information storage, static memory, etc. without intermediate conversion to AC, and can solve the problems of reduced reading operation speed and accuracy.

Pending Publication Date: 2021-05-25
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, low power supplies can degrade the speed and accuracy of read operations

Method used

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  • Memory device and method for assiting read operation in memory device
  • Memory device and method for assiting read operation in memory device
  • Memory device and method for assiting read operation in memory device

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Embodiment Construction

[0012] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and description to refer to the same or like parts.

[0013] It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present invention. Also, it is to be understood that the phraseology and terminology used herein are for the purpose of description and should not be regarded as limiting. The use of "comprises," "including," or "having" and variations thereof herein is intended to cover the items listed thereafter and equivalents thereof as well as additional items. Unless otherwise limited, the terms "connected" and "coupled" and variations thereof herein are used broadly and encompass both direct and indirect connections and couplings.

[0014] see figure 1 , ...

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Abstract

A memory device and a method of assisting a read operation in the memory device are introduced. The memory device may include a logic circuit, a charge pump, a switch and a sense amplifier. The logic circuit is configured to receive at least one input signal and perform a logic operation on the at least one input signal to output an enable signal. The charge pump is coupled to the logic circuit and is configured to generate a boost voltage according to the enable signal. The switch is coupled between the charge pump and a sensing power supply line, and is configured to control an electrical connection between the charge pump and the sensing power supply line according to the enable signal to supply the boost voltage to the sensing power supply line. The sense amplifier is configured to perform a read operation using the boost voltage from the sensing power supply line.

Description

technical field [0001] The present invention relates to a memory device, and more particularly to a memory device and a method of the memory device that can improve the performance of read operations. Background technique [0002] In recent years, memory devices have been used to store information in a wide range of electronic devices. For the purpose of low power consumption, memory devices with low power consumption have been introduced. For example, a low power memory device may have a power-on-reset (POR) trip point below 1V and is required for read operations (eg, , FUSE READ, REGISTER READ) low power supply. However, low power supplies can result in reduced speed and accuracy of read operations. [0003] As memory devices have grown in popularity in recent years, the need for more innovative methods and designs for improving the performance of memory devices has grown. Contents of the invention [0004] The present invention introduces a memory device and a metho...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C5/14G11C7/06G11C17/18
CPCG11C5/145G11C5/148G11C7/06G11C17/18H02M3/07G11C7/062G11C7/08G11C16/26G11C16/30G11C16/3459G11C11/4074G11C11/4091G11C11/4082G11C11/40626
Inventor 林纪舜柳德铉
Owner WINBOND ELECTRONICS CORP