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Acquisition of semiconductor structure parameters, acquisition of detection standards and detection methods

A technology for obtaining methods and structural parameters, applied in the fields of semiconductor/solid-state device testing/measurement, semiconductor device, semiconductor/solid-state device manufacturing, etc., which can solve the problems of capacitor structure failure, difficulty, etching defects, etc.

Active Publication Date: 2022-06-24
CHANGXIN MEMORY TECH INC
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  • Abstract
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  • Application Information

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Problems solved by technology

[0003] Due to the advancement of technology, the feature size of DRAM is getting smaller and smaller, and it is more and more difficult to etch the capacitor structure with high aspect ratio. During the process of forming the capacitor structure with high aspect ratio, etching defects will be formed, resulting in the formation of Some capacitor structures fail, affecting the yield of semiconductor devices

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  • Acquisition of semiconductor structure parameters, acquisition of detection standards and detection methods
  • Acquisition of semiconductor structure parameters, acquisition of detection standards and detection methods
  • Acquisition of semiconductor structure parameters, acquisition of detection standards and detection methods

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Embodiment Construction

[0038] The traditional measurement process usually involves probe testing of wafer products. It is difficult to detect product problems in time, resulting in yield problems in a large number of online products. How to quickly and accurately monitor product abnormalities is an urgent problem to be solved.

[0039] In order to solve the above problem, an embodiment of the present invention provides a method for obtaining parameters of a semiconductor structure, including: obtaining a semiconductor structure, the semiconductor structure includes a substrate, and a capacitor support structure located on the substrate, and the capacitor support structure has a plurality of capacitors hole, the capacitor hole penetrates the capacitor support structure in the thickness direction of the capacitor support structure; remove part of the height of the capacitor support structure; obtain a test pattern, the test pattern is the pattern exposed at the top of the remaining capacitor support str...

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Abstract

An embodiment of the present invention provides a semiconductor structure parameter acquisition, detection standard acquisition and detection method, wherein the semiconductor structure parameter acquisition method includes: acquiring a semiconductor structure, the semiconductor structure includes a substrate, and a capacitive support structure located on the substrate, There are multiple capacitor holes in the capacitor support structure, and the capacitor holes penetrate the capacitor support structure in the thickness direction of the capacitor support structure; remove part of the capacitor support structure; obtain a test pattern, and the test pattern is a pattern exposed on the top of the remaining capacitor support structure; In the test pattern, the spacing between capacitor holes at preset positions is obtained based on preset directions; the embodiment of the present invention aims to provide a method for quickly and accurately monitoring product abnormalities.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for acquiring and detecting semiconductor structural parameters and detection standards. Background technique [0002] Dynamic Random Access Memory (DRAM) stores data by storing charges in a capacitor structure. The larger the aspect ratio of the formed capacitor structure, the greater the capacitance of the capacitor structure and the more charges that can be stored. [0003] Due to the advancement of technology, the feature size of DRAM is getting smaller and smaller, and it is more and more difficult to etch capacitor structures with high aspect ratios. Part of the capacitor structure fails, affecting the yield of semiconductor devices. [0004] The traditional measurement process usually involves probe testing of wafer products. It is difficult to detect product problems in time, resulting in yield problems in a large number of online products. How to quic...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66H01L21/8242
CPCH01L22/12H10B12/03
Inventor 刘欣然王春阳朱长立
Owner CHANGXIN MEMORY TECH INC