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Coarse-grained parallel iterative method and device for dynamic application of interlayer coupling in integrated circuits

An integrated circuit and coarse-grained technology, which is applied in the fields of electrical digital data processing, instruments, calculations, etc., can solve the problems of accelerating iterative solution time, reducing communication, etc., and achieve the effect of avoiding the bottleneck of hard disk reading and writing and reducing waiting time

Active Publication Date: 2021-08-10
北京智芯仿真科技有限公司
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Problems solved by technology

[0005] Based on the above problems, the present invention proposes a coarse-grained parallel iterative method and device for dynamic application of interlayer coupling in integrated circuits. communication, avoiding the hard disk reading and writing bottleneck caused by the peak value of the memory being greater than the available physical memory during multi-process parallel computing, and perfectly solving the process waiting problem caused by the unequal complexity of different computing instances, thereby greatly improving the efficiency of parallel computing; on the other hand , according to the characteristics of interlayer coupling of integrated circuits, all computing particles are merged into two-level parallel computing coarse particles with different ranges of computing task sets, and the computing process is allocated according to the two-level parallel computing coarse particles; finally, based on the electromagnetic field and electromagnetic wave in the Attenuation law in space, when designing a parallel iterative solution method, each iteration calculates the influence of other layers on the source layer through dyadic Green's function, and accumulates the influence as the source item of the source layer, and applies a two-dimensional finite Calculate the field distribution of the layer to update the field and current distribution of the layer, obtain the change of the source layer field, and dynamically modify the range of the source layer affected by other layers, which will greatly speed up the iterative solution time

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  • Coarse-grained parallel iterative method and device for dynamic application of interlayer coupling in integrated circuits

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[0050] In order to make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be described in more detail below in conjunction with the drawings in the embodiments of the present invention.

[0051] It should be noted that: in the drawings, the same or similar symbols represent the same or similar elements or elements with the same or similar functions. The described embodiments are part of the embodiments of the present invention, but not all of the embodiments. In the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0052] In describing the present invention, it is to be understood that...

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Abstract

The invention provides a coarse-grained parallel iterative method and device for dynamically applying interlayer coupling of integrated circuits, wherein the coarse-grained parallel iterative method includes the following steps: firstly, the iterative calculation of interlayer coupling of integrated circuits is divided into parallel calculation granules, and weighted according to the CPU Time is merged into parallel computing coarse grains; secondly, computing tasks are allocated with parallel computing grains as a unit, and the current distribution of the source layer is iterated in parallel. In each iteration, the influence of other layers on the source layer is calculated through dyadic Green's function. And the influence is accumulated as the source item of the source layer, and the two-dimensional finite element is applied to the source layer to calculate its field distribution to update the field and current distribution of the layer, obtain the change of the source layer field, and dynamically modify the source layer affected by other layers The scope of the affected layer; after repeated iterations until the field changes of all layers are less than the specified threshold, the iteration ends. The application can make the calculation time of the electromagnetic response of the three-dimensional multilayer integrated circuit decrease linearly with the number of parallel processes.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a coarse-grain parallel iterative method and device for dynamic application of interlayer coupling of integrated circuits. Background technique [0002] When the integrated circuit is working, due to the transmission of high-speed signals on its multi-layer layout, a high-frequency alternating electromagnetic field will be formed. on a small semiconductor substrate. In order to achieve more functions, VLSI has dozens to hundreds of layers of structure, each layer structure is extremely complex, integrating millions or even tens of millions of transistors, and has a multi-scale structure, from the centimeter level to the latest state-of-the-art nanoscale. In order to ensure that the integrated circuit can work normally and realize the functions designed in advance, it is necessary to ensure the power integrity and signal integrity of the integrated circuit first. Ac...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/398
CPCG06F30/398
Inventor 唐章宏邹军王芬汲亚飞黄承清
Owner 北京智芯仿真科技有限公司