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Pulse width expansion circuit

A technology of pulse width and expansion circuit, applied in the field of data expansion, can solve problems such as pulse width distortion, and achieve the effect of solving pulse width distortion

Active Publication Date: 2022-02-25
中科南京智能技术研究院
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to provide a pulse width extension circuit, which can be inserted between cascaded in-memory computing units and can effectively solve the problem of pulse width distortion in in-memory computing

Method used

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  • Pulse width expansion circuit

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Effect test

Embodiment 1

[0025] The invention discloses a pulse width extension circuit, which comprises: a first switching tube M1, a second switching tube M2, a third switching tube M3, a fourth switching tube M4 and N load units 1, where N is greater than or a positive integer equal to 1; the first terminal of the first switching tube M1 and the first terminal of the second switching tube M2 input the control signal IN, and the second terminal of the first switching tube M1 is connected to a power supply, so The third end of the first switching tube M1 is connected to the second end of the second switching tube M2, the third end of the second switching tube M2 is grounded, and one end of each of the load units 1 is respectively connected to the connection point N1 connection, the other end of each load unit 1 is grounded, the second end of the third switching tube M3 is connected to the connection point N1, the first end of the third switching tube M3, the fourth switching tube M4 The first end inp...

Embodiment 2

[0032] In this embodiment, three load units are taken as an example for discussion, so the configured pulse width expansion circuit structure is as follows figure 1 shown. When the input changes from a low level to a high level, the transistor M4 is turned on, and the connection point N2 can be quickly discharged to a low level through the transistor M4, and the output OUT of the inverter TN quickly jumps to a high level; the transistor M2 is turned on, Discharge the voltage at the connection point N1 to a low level. When the input changes from high level to low level, transistor M1 and transistor M3 are turned on. Since the connection point N1 is initially low level, the connection point N2 cannot be charged to the high level quickly, and it needs to wait until the connection point N1 is charged through M1 After reaching the high level, the connection point N2 can be charged to the high level, and then the output OUT of the inverter TN can change to the low level, so the out...

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PUM

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Abstract

The invention relates to a pulse width expansion circuit. The circuit comprises a first switch tube, a second switch tube, a third switch tube, a fourth switch tube and N load units; the first end of the first switch tube and the first end of the second switch tube input control signals, the second end of the first switch tube is connected with a power supply, the third end of the first switch tube is connected with the second end of the second switch tube, the third end of the second switch tube is grounded, one end of each load unit is connected with a connection point N1, the other end of each load unit is grounded, the second end of the third switch tube is connected with the connection point N1, the first end of the third switch tube and the first end of the fourth switch tube input control signals, the third end of the third switch tube is connected with the second end of the fourth switch tube, and the third end of the fourth switch tube is grounded. The disclosed pulse width expansion circuit is inserted between cascaded in-memory calculation units, so that the problem of pulse width distortion in in-memory calculation can be effectively solved.

Description

technical field [0001] The invention relates to the technical field of data extension, in particular to a pulse width extension circuit. Background technique [0002] In in-memory computing, as the number of cascaded in-memory computing units increases, the pulse width representing the input data information will be severely distorted, and the pulse width will gradually narrow during propagation, resulting in a large error in the results of in-memory computing. big. Traditional pulse width extension circuits are mostly implemented by delaying the inverter chain or controlling the gate voltage of the transistor. Extending the pulse width with an inverter chain delay introduces a huge area and power consumption; while controlling the gate voltage introduces a large pulse width error. A small number of pulse width extension circuits extend the pulse width by controlling the charging of capacitors, but they all use fixed capacitive loads, and the pulse width cannot be flexibly...

Claims

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Application Information

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IPC IPC(8): H03K5/04
CPCH03K5/04
Inventor 游恒乔树山尚德龙周玉梅
Owner 中科南京智能技术研究院