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A pulse width extension circuit

A technology of pulse width and expansion circuit, which is applied in the field of data expansion, can solve problems such as pulse width distortion, and achieve the effect of solving pulse width distortion

Active Publication Date: 2022-05-27
中科南京智能技术研究院
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to provide a pulse width extension circuit, which can be inserted between cascaded in-memory computing units and can effectively solve the problem of pulse width distortion in in-memory computing

Method used

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  • A pulse width extension circuit

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Effect test

Embodiment 1

[0025] The invention discloses a pulse width expansion circuit, which comprises: a first switch tube M1, a second switch tube M2, a third switch tube M3, a fourth switch tube M4 and N load units 1, wherein N is greater than or a positive integer equal to 1; the first end of the first switch M1 and the first end of the second switch M2 input the control signal IN, and the second end of the first switch M1 is connected to the power supply, so The third end of the first switch tube M1 is connected to the second end of the second switch tube M2, the third end of the second switch tube M2 is grounded, and one end of each of the load units 1 is respectively connected to the connection point N1 connected, the other end of each load unit 1 is grounded, the second end of the third switch tube M3 is connected to the connection point N1, the first end of the third switch tube M3, the first end of the fourth switch tube M4 The first end inputs the control signal IN, the third end of the t...

Embodiment 2

[0032] In this embodiment, three load units are used as an example for discussion, so the configuration of the pulse width extension circuit is as follows figure 1 shown. When the input jumps from a low level to a high level, the transistor M4 is turned on, the connection point N2 can be quickly discharged to a low level through the transistor M4, and the output OUT of the inverter TN quickly jumps to a high level; the transistor M2 is turned on, Discharge the voltage at connection point N1 to a low level. When the input jumps from high level to low level, transistor M1 and transistor M3 are turned on. Since connection point N1 is initially low level, connection point N2 cannot be quickly charged to high level, and it needs to wait until connection point N1 is charged through M1. After reaching a high level, the connection point N2 can be charged to a high level, and then the output OUT of the inverter TN can become a low level, so the output pulse width is extended compared ...

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PUM

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Abstract

The invention relates to a pulse width extension circuit, comprising: a first switching tube, a second switching tube, a third switching tube, a fourth switching tube and N load units; a first end of the first switching tube, a second switching tube The first end of the first switch is input with a control signal, the second end of the first switch tube is connected to the power supply, the third end of the first switch tube is connected to the second end of the second switch tube, and the third end of the second switch tube grounding, one end of each load unit is connected to the connection point N1, the other end of each load unit is grounded, the second end of the third switch tube is connected to the connection point N1, the first end of the third switch tube, the fourth switch tube The first terminal inputs a control signal, the third terminal of the third switching transistor is connected to the second terminal of the fourth switching transistor, and the third terminal of the fourth switching transistor is grounded. The invention inserts the disclosed pulse width extension circuit between cascaded in-memory computing units, which can effectively solve the problem of pulse width distortion in in-memory computing.

Description

technical field [0001] The invention relates to the technical field of data expansion, in particular to a pulse width expansion circuit. Background technique [0002] In in-memory computing, with the increase of the number of computing units in the cascaded memory, the pulse width representing the input data information will be seriously distorted, and the pulse width will gradually become narrower during propagation, resulting in a larger error in the result of in-memory computing. big. The traditional pulse width extension circuit is mostly realized by means of inverter chain delay or control transistor gate voltage. Using the inverter chain delay to expand the pulse width will bring huge area and power consumption overhead; and using the method of controlling the gate voltage will bring a large pulse width error. A small number of pulse width expansion circuits will use the method of controlling capacitor charging to expand the pulse width, but they all use fixed capaci...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K5/04
CPCH03K5/04
Inventor 游恒乔树山尚德龙周玉梅
Owner 中科南京智能技术研究院