Test method and test seat making process for high-power surface mounted integrated circuit

Abstract

The test method for high-power surface mounted IC includes the following steps: providing one surface mounted IC test socket; set one surface mounted IC on the lower socket with upside down; and fixing one upper socket set on the surface mounted IC. The said method can increase the contact area between the pins of the surface mounted IC and the pins of the lower socket, avoid the damage to the 8 deg inclination angle of pins of the surface mounted IC when the pins of the IC are pressed to corresponding pins of the test socket, reduce the contact resistance between the pins of the IC and the pins of the socket and make the test socket capable of bearing relatively high current.

Description

Technical field [0001] The present invention relates to a method for testing a high-power surface mount integrated circuit and a method for manufacturing a test socket, in particular to a method for increasing the pins of the integrated circuit and the pins of the test socket by inverting the surface mount integrated circuit The contact area and the reduced contact impedance enable the test socket to withstand larger currents to test high-power surface-mount integrated circuits. The test method of high-power surface-mount integrated circuits. Background technique [0002] With the great advancement of semiconductor technology, the speed and efficiency have increased day by day, and surface mount (SMD) integrated circuits (hereinafter referred to as IC) have jumped from the old special miniaturized parts to the mainstream. Especially in recent years, due to technological breakthroughs, SMD integrated circuits can be used to achieve high-power work of several amperes. High-frequenc...

AI Technical Summary

Problems solved by technology

However, if it is not fixed firmly, the contact resistance between the pin of the surface mount IC 1 and the pin of the lower base 2 will be too large, and the contact length between the pin and the pin of the lower base 2 is only 0.16mm (max ), making the test socket unable to test high-power surface-mount integrated circuits with output of several amperes

Therefore, it is known that the positive placement method cannot destroy this specification, resulting in two major defects: 1. The size of the contact surface will result in a small amount of current; 2. The size of the pressure, because it cannot destroy the specification of an 8-degree downward slope

Therefore, it is known that test sockets cannot test high-power surface-mount integrated circuits, and currently there is no suitable test socket, so simulation methods are used for measurement, but the gap between simulated test results and actual conditions affects the stability of shipments

Images