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Method and apparatus for encoding interlaced macroblock texture information

a macroblock texture and information technology, applied in the field of methods and apparatus for encoding interlaced macroblock texture information, can solve the problems of limited frequency bandwidth of a conventional transmission channel, low coding efficiency of conventional transmission channels, and insufficient padding of certain field blocks

Inactive Publication Date: 2010-11-23
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since, however, the available frequency bandwidth of a conventional transmission channel is limited, in order to transmit the large amount of digital data therethrough, it is necessary to compress or reduce the volume of data through the use of various data compression techniques, especially in the case of such low bit-rate video signal encoders as video-telephone and teleconference systems.
While the progressive padding process as described above may be used to encode progressive texture information which has a larger spacial correlation between rows on a macroblock basis, the coding efficiency thereof may be low if the motion of an object within a VOP or a frame is considerably large.
However, if all field blocks are padded without considering their correlation between fields, certain field blocks may not be properly padded.

Method used

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  • Method and apparatus for encoding interlaced macroblock texture information
  • Method and apparatus for encoding interlaced macroblock texture information
  • Method and apparatus for encoding interlaced macroblock texture information

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Experimental program
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Embodiment Construction

[0024]Referring to FIG. 1, there is shown a schematic block diagram of an apparatus for encoding texture information on a current VOP. The texture information partitioned into a plurality of texture macroblocks is applied to a division circuit 102 on a texture macroblock basis, wherein each texture macroblock has M×N texture pixels, M and N being positive even integers typically ranging between 4 and 16.

[0025]The division circuit 102 divides each texture macroblock into a top and a bottom field blocks which may be referred to as interlaced texture information, wherein the top field block having M / 2×N texture pixels contains every odd row of each texture macroblock and the bottom field block having the other M / 2×N texture pixels contains every even row of each texture macroblock. The top and the bottom field blocks for each texture macroblock are sequentially provided as a current top and a current bottom field blocks, respectively, to a subtractor 104 and a motion estimator 116.

[002...

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Abstract

A method for padding interlaced texture information on a reference VOP to perform a motion estimation detects whether said each texture macroblock of the reference VOP is a boundary block or not. After the undefined texture pixels of the boundary block are extrapolated from the defined texture pixels thereof by using a horizontal repetitive padding, a transparent row padding and a transparent field padding sequentially, an undefined adjacent block is expanded based on the extrapolated boundary block.

Description

[0001]More than one reissue application has been filed. The present reissue application Ser. No. 12 / 131,723, filed Jun. 2, 2008, is a continuation of the reissue application Ser. No. 12,131,712 filed Jun. 2, 2008, and the present reissue application Ser. No. 12 / 131,723 and the reissue application Ser. No. 12,131,712 are continuation cases of reissue application Ser. No. 10 / 611,938 filed Jul. 3, 2003, now abandoned, which is a reissue application of U.S. Pat. No. 6,259,732 B1, which issued on Jul. 10, 2001 from U.S. application Ser. No. 09 / 088,375 and which claims priority under 35 U.S.C. 119 from Korean Patent Application KR 98-8637 filed Mar. 14, 1998. <?insert-end id="INS-S-00001" ?>FIELD OF THE INVENTION[0002]The present invention relates to a method and apparatus for encoding interlaced macroblock texture information; and, more particularly, to a method and apparatus for padding interlaced texture information on a reference VOP on a texture macroblock basis in order to per...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H04N7/12H04N7/24H04N19/132H04N19/137H04N19/167H04N19/17H04N19/176H04N19/196H04N19/20H04N19/21H04N19/50H04N19/503H04N19/51H04N19/563H04N19/59H04N19/61H04N19/625H04N19/85H04N19/91
CPCH04N19/563H04N19/51H04N19/61H04N19/593H04N19/16H04N19/20H04N19/649
Inventor LEE, SANG-HOON
Owner ZTE CORP