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Chip general detector and its structure method

A general-purpose testing and chip technology, applied in measuring devices, electronic circuit testing, single semiconductor device testing, etc., to avoid repeated development, save time and cost, and reduce difficulty

Inactive Publication Date: 2008-12-03
HISILICON TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] The purpose of the present invention is to overcome the defects in the above-mentioned existing single test platform mother-daughter board technical scheme, propose a kind of cross-test platform chip universal test device and its construction method, avoid repeatedly making DIB when different test platforms are developing test programs test board

Method used

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  • Chip general detector and its structure method
  • Chip general detector and its structure method
  • Chip general detector and its structure method

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Embodiment

[0064] Such as Figure 6 As shown, the universal interface connector 2 includes 16 digital interface modules 21, respectively denoted by "DIGxx", 2 analog interface modules 22, respectively denoted by "ANAxx", and 4 power interface modules 23, respectively denoted by "DPSxx" express. Wherein, the digital interface module 21 , the analog interface module 22 and the power interface module 23 have fixed positions, and the fixed positions are determined by the unified interface standard defined in this embodiment. In this way, the universal interface connector 2 can respectively connect the digital signals, analog signals and power signals on the channels of the test sub-board 3 and the test motherboard 1 .

[0065] In this embodiment, the universal interface connector 2 also includes four control switch interface modules 24, represented by "UTIxx". The control switch interface modules 24 have a fixed position that matches the unified interface standard, and are used to connect t...

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Abstract

This inventioin discloses a general test device for chips including a test mother board, a test sub-board and a general interface connector, in which, the mother board is corresponding to a test platform exclusively and connected with one end of the connector, the sub-board is corresponding to a chip structure and connected with the other end of the connector, which applies a standard interface. This invention also discloses a method for structuring the general test device for chips, which designs the general interface connector in light of designed uniform interface standard and sets up associations between interface signals of the boards and the connector, which realizes that a same test sub-board platform is used in different test mother boards and a same mother board uses different sub-boards.

Description

technical field [0001] The invention relates to semiconductor device testing technology, in particular to a chip universal testing device and a construction method thereof. Background technique [0002] In order to ensure the quality of semiconductor chips and reduce development costs, tests are generally performed on automatic test equipment (Automatic Test Equipment, abbreviated as ATE, referred to as testing machine) in the initial stage of chip development. The general test equipment is as follows: figure 1 As shown, it includes: socket (Socket) or manipulator (HandlerContactor) B, which is used to fix the packaged chip to be tested (Device Under Test, referred to as DUT) A; device interface board (Device Interface Board, referred to as DIB) C; test platform e. Such as figure 1 As shown, the DUT is connected to the DIB through the Socket, and the DIB is connected to the connection channel of the test platform through the pogo pin D. In this way, the test platform can ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R1/02G01R1/06G01R31/00G01R31/26G01R31/28H01L21/66
Inventor 张欣杨文进李益欢王宇林建军戈文李春雷
Owner HISILICON TECH
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