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Data processing system

A computing processing and processor technology, which is applied in the field of computing processing systems and can solve problems such as the inability of the processor to read programs

Inactive Publication Date: 2008-01-02
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The processor cannot directly read programs, etc. from the "NAND" flash memory.
The program is read out only after it is transferred from the NAND flash memory to DRAM (dynamic random access memory), etc., so there will be a waiting time for the processor

Method used

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Experimental program
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Embodiment Construction

[0037] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0038] (first embodiment)

[0039] FIG. 1 is a block diagram showing the configuration of an arithmetic processing system according to a first embodiment of the present invention. The arithmetic processing system of Fig. 1 includes: processor 101, processor interface 102, flash memory interface 103 as the first access controller, flash memory 104 as the first memory, DMA (direct memory access) control as the data transmission part device 105, data management unit 106, DRAM interface 107 as the second access controller, and DRAM 108 as the second memory.

[0040] The flash memory 104 is, for example, a NAND type flash memory, and a predetermined routine is required to access data stored in the flash memory 104 . The data stored in the flash memory 104 is transferred to the DRAM 108 and then read out. The flash memory interface 103 access...

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Abstract

A data processing system includes: a processor; a first memory for storing data which is accessed by the processor; a second memory having an area in which transferred data is stored; and a data control section for making a data transfer section transfer data from the first memory to the area in the second memory in accordance with an access request made by the processor, and storing area information indicating the data stored in the area. If data accessed by the processor is the data indicated by the area information, the data control section makes the processor access the second memory.

Description

technical field [0001] The invention relates to an operation processing system equipped with a processor. Background technique [0002] Large-capacity and relatively cheap NAND flash memory is widely used in LSI (Large-scale integrated circuit) systems such as digital still cameras. The processor cannot directly read programs, etc. from the NAND flash memory. The program, etc. must be read out after being transferred from the NAND flash memory to DRAM (dynamic random access memory) or other memory, so there will be a waiting time for the processor. [0003] Therefore, for example, in Japanese Patent Application Laid-Open No. 2002-297445, a microprocessor for shortening the waiting time of the processor is described. The data being transmitted. Contents of the invention [0004] -The problem that the invention is intended to solve- [0005] However, when using a conventional microcontroller, all data cannot be transferred if the transfer destination memory does not have...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/28
CPCG06F13/4234
Inventor 村山谦太朗
Owner PANASONIC CORP