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Apparatus and method for cache control

A cache control and device technology, applied in the direction of using stored programs for program control, information storage, static memory, etc., can solve problems such as delays, and achieve the effect of improving efficiency, improving block-level access efficiency, and improving cache hit rate.

Inactive Publication Date: 2010-06-23
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] However, even when burst access is applied, an initial delay occurs when a single burst operation is completed, or when new data is accessed, for example, when the row to be accessed changes
[0007] That is, in block-level access of video codecs, there is a delay every time a row changes due to the limited amount of contiguous data

Method used

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  • Apparatus and method for cache control
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  • Apparatus and method for cache control

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Embodiment Construction

[0035] Reference will now be made in detail to example embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like parts throughout. The exemplary embodiments are described below in order to explain the disclosure of the present invention by referring to the figures.

[0036] figure 1 The configuration of the cache control device 100 according to an example embodiment is shown.

[0037] The parameter input unit 110 may receive a first parameter from a central processing unit (CPU). The first parameter may include information about data to be accessed by the CPU. According to an example embodiment, the first parameter may be the same as will refer to image 3 with Figure 10 A two-dimensional (2D) block cache as detailed or a three-dimensional (3D) block cache including frames corresponds.

[0038] The cache index extracting unit 120 may extract a Y cache index and an X cache index from the first parameter. Al...

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Abstract

A cache control apparatus and method are provided. The cache control apparatus may include a parameter input unit to receive a first parameter corresponding to a block-level cache in a main memory, a cache index extraction unit to extract a cache index from the first parameter, a cache tag extraction unit to extract a cache tag from the first parameter, and a comparison unit to determine whether a cache hit occurs using the cache index and the cache tag.

Description

technical field [0001] One or more example embodiments relate to cache control apparatus and methods, and more particularly, to cache control apparatus and methods for memory data access in arbitrary shape blocks. Background technique [0002] Now, due to the development of multimedia technology, a large amount of content can be provided to users in various ways. [0003] Much research has been done on various video processing techniques to control excessive memory access due to the large amount of video data associated with the video data codecs providing the content of the service. When the number of videos is not large, real-time processing can be performed. However, the number of videos may increase due to the increased demand for high-resolution videos. Therefore, memory access for video processing is the focus of attention. [0004] Specifically, due to the physical characteristics of Dynamic Random Access Memory (DRAM: Dynamic Random Access Memory), which can store...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/4063G11C11/413G06F12/0875
CPCG06F12/0875G06F2212/1016G06F9/06G06F12/06
Inventor 金斗炫宋准镐
Owner SAMSUNG ELECTRONICS CO LTD