High frequency switch circuit for inhibiting substrate bias effect in sampling hold circuit

Abstract

The invention discloses a high frequency switch circuit for inhibiting substrate bias effect in a sampling hold circuit, comprising a first substrate bias-inhibiting high frequency switch unit, a second substrate bias-inhibiting high frequency switch unit and a transmission gate switch, wherein the first substrate bias-inhibiting high frequency switch unit consists of two NMOS (N-channel Metal Oxide Semiconductor) transistors and two PMOS (P-channel Metal Oxide Semiconductor) transistors, the second substrate bias-inhibiting high frequency switch unit consists of two NMOS transistors and two PMOS transistors and the transmission gate switch consists of one NMOS transistor and one PMOS transistor. In the high frequency switch circuit, because a feed through signal introduced by a switch parasitic capacitor can be grounded through a by-pass, the variation of the input end does not affect the output end after the switch is turned off, thereby the hold function of high precision is realized. The switch design of inhibiting the substrate bias effect is utilized. Because the variation of a threshold voltage caused by the inequality of a substrate and a source electric potential is inhibited, the linearity of the equivalent resistance of the switch circuit is better and the signal-to-noise distortion ratio of the circuit is improved.

Description

technical field [0001] The invention relates to a high-frequency switch circuit for suppressing substrate bias effect, which belongs to the technical field of integrated circuits. Background technique [0002] Now the module that is often used in the design of analog integrated circuits, its function is to complete the acquisition of analog input signals and keep them at the output for a certain period of time to facilitate the processing of subsequent signal processing circuits. Such as figure 1 The capacitor flipping switched capacitor sampling and holding circuit shown mainly includes an input sampling switch T1, an output holding switch T2, a sampling capacitor C, and an operational amplifier. When the sampling phase is valid, the sampling switch T1 is closed, the holding switch T2 is open, and the analog signal is collected on the sampling capacitor C; when the holding phase is valid, the sampling switch T1 is open, the holding switch T2 is closed, and the signal on th...

AI Technical Summary

Problems solved by technology

[0004] 1. When the frequency of the input signal is high, the CMOS transmission gate has a small signal charge feedthrough effect, which affects the accuracy of maintaining the signal, and is not allowed by the system in high-precision applications

[0005] 2. Since the substrate of the CMOS transmission gate is generally connected to the highest potential of the circuit (for PMOS transistors) or the closest potential (for NMOS transistors), the inconsistency between the substrate and source voltage leads to the substrate bias effect, which affects the stability of the threshold , which leads to a decrease in the linearity of the circuit

[0006] The existing technology cannot solve the above two problems at the same time, that is, under the high-frequency signal input, it can not only suppress the charge feedthrough effect but also suppress the threshold voltage change caused by the substrate bias effect.

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