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Chip with convex block and packaging structure of chip with convex block

A packaging structure and bump technology, which is applied in electrical components, electrical solid devices, circuits, etc., can solve the problems of reducing product yield, qualitative change, and easy oxidation of bumps 13.

Active Publication Date: 2012-12-26
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The bump 13 is made of a single metal, that is, the melting point of the bump 13 is within a fixed range. During the reflow step, the bump 13 will be in a molten state due to high temperature, so as to facilitate interconnection with the solder pad. , however, its melting state is not easy to control, and it is difficult to connect with the pad, which reduces the product yield
In addition, if the bump 13 is not coated with a metal with low activity, the bump 13 is easily oxidized, resulting in qualitative change.

Method used

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  • Chip with convex block and packaging structure of chip with convex block
  • Chip with convex block and packaging structure of chip with convex block
  • Chip with convex block and packaging structure of chip with convex block

Examples

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Embodiment Construction

[0085] figure 2 It is a schematic cross-sectional view showing the first embodiment of the chip with bumps according to the present invention. refer to figure 2, the chip 2 with bumps includes a chip body 21 , a protective layer 22 , an UBM layer 25 and at least one bump 23 . The chip body 21 has a surface 211 . In this embodiment, the chip body 21 is a dummy chip, which includes a through hole 212 and a circuit layer (not shown in the figure), and the circuit layer is located on the surface 211 of the chip body 21 . However, in other applications, the chip body 21 can be a functional chip (Device Chip), which also includes an active surface, at least one pad and an image sensor (CMOS Image Sensor) (not shown in the figure). The bonding pad is located in the chip body 21 and exposed on the active surface. The image sensing element is located in the chip body 21 , exposed on the active surface, and located at a relative position outside the bonding pad.

[0086] The prot...

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PUM

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Abstract

The invention discloses a chip with a convex block and a packaging structure of the chip with the convex block. The chip comprises a chip body, at least one through hole, a protective layer, a metal layer under a sphere and at least one convex block. The through hole penetrates the chip body and is exposed on the usrface of the chip body. The protective layer is positioned on the surface of the chip body, the protective layer comprises at least one opening, and the opening exposes the through hole. The metal layer under the sphere is positioned in the opening of the protective layer and is connected with the through hole. The convex block is positioned on the metal layer under the sphere and comprises a first metal layer, a second metal layer and a third metal layer. The first metal layer is positioned on the metal layer under the sphere. The second metal layer is positioned on the first metal layer. The third metal layer is positioned on the second metal layer. Therefore, the convex block can be connected with two chips and stack up the chips, thereby improving the product density and further reducing the product size.

Description

technical field [0001] The invention relates to a chip and a packaging structure with the chip, in particular to a chip with a bump and a packaging structure for the chip with the bump. Background technique [0002] figure 1 is a schematic cross-sectional view showing a known chip with bumps. refer to figure 1 , the known chip 1 with bumps includes a chip body 11 , a protective layer 12 , an UBM layer 14 and at least one bump 13 . The chip body 11 has a surface 111 . The protection layer 12 is located on the surface 111 of the chip body 11 , and the protection layer 12 has at least one opening 121 . The UBM layer 14 is located at the opening 121 of the protection layer 12 . The bump 13 is located on the UBM layer 14 . [0003] The disadvantages of this known chip 1 with bumps are as follows. The bump 13 is made of a single metal, that is, the melting point of the bump 13 is within a fixed range. During the reflow step, the bump 13 will be in a molten state due to high...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/482H01L23/12H01L25/00
CPCH01L2224/16225
Inventor 杨国宾
Owner ADVANCED SEMICON ENG INC