Chip with convex block and packaging structure of chip with convex block
A packaging structure and bump technology, which is applied in electrical components, electrical solid devices, circuits, etc., can solve the problems of reducing product yield, qualitative change, and easy oxidation of bumps 13.
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[0085] figure 2 It is a schematic cross-sectional view showing the first embodiment of the chip with bumps according to the present invention. refer to figure 2, the chip 2 with bumps includes a chip body 21 , a protective layer 22 , an UBM layer 25 and at least one bump 23 . The chip body 21 has a surface 211 . In this embodiment, the chip body 21 is a dummy chip, which includes a through hole 212 and a circuit layer (not shown in the figure), and the circuit layer is located on the surface 211 of the chip body 21 . However, in other applications, the chip body 21 can be a functional chip (Device Chip), which also includes an active surface, at least one pad and an image sensor (CMOS Image Sensor) (not shown in the figure). The bonding pad is located in the chip body 21 and exposed on the active surface. The image sensing element is located in the chip body 21 , exposed on the active surface, and located at a relative position outside the bonding pad.
[0086] The prot...
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