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Data processor supporting interrupt shielding instruction

A technology for data processors and shielding instructions, applied in concurrent instruction execution, machine execution devices, etc., can solve problems such as increasing design complexity and destroying architecture, and achieve the effect of simplifying design complexity and avoiding destroying architecture

Active Publication Date: 2011-08-03
C SKY MICROSYST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to overcome the deficiencies of existing data processors that destroy the structure and increase design complexity when solving the problem of interrupt competition locks, the present invention provides a data processor that supports interrupt masking instructions that avoids destroying the structure and simplifies design complexity

Method used

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Examples

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Embodiment Construction

[0027] The present invention will be further described below in conjunction with the accompanying drawings.

[0028] refer to Figure 1 ~ Figure 4 , a data processor supporting interrupt masking instructions, comprising:

[0029] An instruction fetching unit is used to read instructions from the instruction memory and send them to the instruction decoding unit;

[0030] The instruction decoding unit is used to decode the sent instruction, and decode the relevant type information and operand information of the instruction;

[0031] The instruction execution unit is used to make corresponding processing according to the instruction decoding result;

[0032] An exception and interrupt processing unit is used to handle exceptions and interrupt requests generated by instructions;

[0033] The instruction set in the instruction memory also includes an interrupt mask instruction, and the interrupt mask instruction includes a type field, a start field, and an end field, wherein the...

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PUM

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Abstract

A data processor supporting an interrupt shielding instruction comprises an instruction extraction unit, an instruction decoding unit, an instruction execution unit and an exception and interrupt processing unit; an instruction set in an instruction memory further comprises an interrupt shielding instruction; the interrupt shielding instruction comprises a type field, a start field and an end field; the data processor further comprises an interrupt shielding controller; the interrupt shielding controller is used for detecting the interrupt shielding instruction information and the following instruction complete information transmitted by the instruction execution unit; an instruction sequence between the initial position and the end position of the relative current interrupt shielding instruction is generated into the interrupt shielding information; the output end of the instruction execution unit is connected with the interrupt shielding controller; and the interrupt shielding controller is connected with the exception and interrupt processing unit. The data processor supporting the interrupt shielding instruction avoids the damage to a framework and simplifies the design complexity.

Description

technical field [0001] The present invention relates to a data processor. Background technique [0002] In order to improve the concurrency and throughput of the data processor and improve the efficiency of switching between multiple processes, a multi-thread processor is introduced. Compared with multi-process, the most prominent point of multi-threading is that it realizes the sharing of resources, which greatly improves the operating efficiency of the program. [0003] The sharing of instruction segments or data segments between multiple threads is accomplished by means of locks. For example, when two threads share a lock, when one thread acquires the lock, the other thread is in a waiting state until the lock is released, thus ensuring the accuracy of resource sharing. For the most commonly used spin lock, the process of obtaining the lock usually requires two steps: the first step is to obtain the state of the lock from the memory; the second step is to determine whet...

Claims

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Application Information

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IPC IPC(8): G06F9/38G06F9/30
Inventor 郑丹丹项晓燕吕冬明郭宇波刘兵丁永林
Owner C SKY MICROSYST CO LTD
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