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Method, device and system for determining bandwidth characteristics of phase-locked loop pll

A technology of bandwidth characteristics and phase-locked loop, applied in the field of circuits, can solve the problems of reduced modulation accuracy and achieve easy-to-determined effects

Active Publication Date: 2011-12-14
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, when directly modulating the PLL, the phase modulated signal may be effectively low-pass filtered, but the modulation accuracy is reduced

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  • Method, device and system for determining bandwidth characteristics of phase-locked loop pll

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Embodiment Construction

[0030] Next, we will refer to figure 1 Introducing the present invention, which describes a method for measuring the closed-loop bandwidth characteristics of a Phase Lock Loop (PLL) comprising a Voltage Controlled Oscillator (VCO) controlled by a tuning voltage.

[0031] A method for measuring the closed-loop bandwidth characteristics of a phase-locked loop in an embodiment of the present invention includes the following steps:

[0032] Comparing the VCO tuning voltage to the low threshold voltage "C" and the high threshold voltage "J";

[0033] The VCO tuning voltage is generated by:

[0034] Adjust the frequency division value of the PLL internal frequency divider, so that when the tuning voltage output by the PLL reaches the low threshold voltage (step C), the forced tuning voltage changes to the direction of the high threshold voltage (step I); and, the tuning of the PLL output When the voltage reaches the high threshold voltage (step J), the tuning voltage is forced to ...

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Abstract

The invention relates to a method and device for determining the bandwidth characteristic of a nearest PLL (Phase Locked Loop). The device comprises a VCO (Voltage-Controlled Oscillator) (53) controlled by a tuning voltage. In the embodiment of the invention, the tuning voltage is respectively compared with a low-threshold voltage and a high-threshold voltage and is subjected to oscillation by adjusting a frequency division value. The regulation of the frequency division value is that: under the control of the PLL, the tuning voltage is converted into the high-threshold voltage when reaching the low-threshold voltage and is converted into the low-threshold voltage when reaching the high-threshold voltage. The cycle of oscillation of the tuning voltage between the low-threshold voltage and the high-threshold voltage is calculated by counting reference clock cycles. Related loop bandwidth of the PLL can be determined by comparing the counting value of the reference clock cycles with the reference value of a clock cycle.

Description

technical field [0001] The invention relates to the field of circuits, in particular to a method, device and system for determining the PLL bandwidth characteristics of a phase-locked loop. Background technique [0002] Phase modulation of the carrier is typically performed by modulating the phase-locked loop PLL that generates the carrier using a polar modulation scheme. To minimize the noise generated by a phase-locked loop PLL, its bandwidth is typically smaller than the modulation bandwidth of modern wireless communication protocols such as WCDMA and EDGE, and its modulation bandwidth may only be about one-fifth of that required for phase modulation. Therefore, when directly modulating the PLL, it may effectively low-pass filter the phase modulation signal, but the modulation accuracy is reduced. [0003] To compensate for this deficiency, the modulating signal can be precompensated with a higher frequency. To do this, one or more frequency characteristics of the PPL, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/08H03L7/099H03L7/097
Inventor 克里斯蒂・古安德鲁・甲库伯欧拉・皮特森安德鲁・埃莫瑞科李冰新
Owner HUAWEI TECH CO LTD