Multichannel NAND flash parallel memory controller

A storage controller and multi-channel technology, which is applied in the direction of instruments, response error generation, electrical digital data processing, etc., can solve the problem that the storage controller cannot meet the high bandwidth requirements of data-intensive calculations, etc.

Active Publication Date: 2012-07-04
NAT UNIV OF DEFENSE TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] The technical problem to be solved by the present invention is to propose a multi-channel NAND flash parallel storage controller in

Method used

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  • Multichannel NAND flash parallel memory controller
  • Multichannel NAND flash parallel memory controller
  • Multichannel NAND flash parallel memory controller

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Embodiment Construction

[0040] figure 1 Is the overall structure block diagram of the present invention. The present invention is installed between the NAND flash memory chip and the transmission conversion layer of the host, and the present invention establishes the data transmission between the host end and the NAND flash memory chip according to the input channel request sent by the transmission conversion layer path. The invention consists of a switching structure module and n bottom storage controllers, where n is the number of target chips.

[0041] The switch fabric module is connected with n underlying storage controllers and the transmission conversion layer of the host. The switch fabric module receives the input channel request of the transmission conversion layer, and outputs the request to the idle channel according to the working status of the target chip fed back from the bottom storage controller. The underlying memory controller to which the target chip is connected. n underlying ...

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Abstract

The invention discloses a multichannel NAND flash parallel memory controller and aims to provide a memory controller which is capable of providing larger aggregation bandwidth and has high data reading and writing reliability. The multichannel NAND flash parallel memory controller comprises a switching structure module and n bottom-layer memory controllers, wherein the switching structure module comprising a request queue, a transmission arbitration member and a crossbar switch is used for carrying out transmission arbitration on requests of a plurality of channels; each bottom-layer memory controller consisting of a master control logic module and an ECC (Error Checking and Correcting) module is used for generating a control signal meeting a chip time sequence requirement and carrying out ECC on data; the master control logic module comprises a data buffer, a third register group and a master controller, and the ECC module comprises an ECC master control logic, an ECC check code generator and an error address generator. By using the multichannel NAND flash parallel memory controller, a parallel access mechanism of a multichannel NAND flash chip is realized, the aggregation bandwidth is effectively increased, the requirement of data intensive calculation for large bandwidth is met, an ECC function is realized, and the data reliability is improved.

Description

technical field [0001] The invention relates to a storage controller, in particular to a multi-channel NAND (NAND) flash parallel storage controller. Background technique [0002] With the rapid development of network, computing, storage and other technologies, data has shown a geometric progression explosion, and data-intensive applications have widely appeared in social life, such as the Facebook platform. Such applications need to spend a lot of time for data I / O transmission, especially for random access to small pieces of data in massive data. Traditional data centers use mechanical hard drives as their storage media, but the high power consumption, high latency, and low bandwidth of mechanical hard drives can no longer meet the needs of data-intensive applications. On the other hand, compared with mechanical hard disks, NAND flash memory has lower power consumption and better shock resistance, especially since NAND flash does not have seek time and rotation time, it i...

Claims

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Application Information

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IPC IPC(8): G06F11/10G06F13/18
Inventor 肖侬赖明澈黄立波刘芳陈志广欧洋
Owner NAT UNIV OF DEFENSE TECH
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