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Microprocessor instruction set validation method

A microprocessor and verification method technology, applied in the direction of digital data authentication, multi-program device, etc., can solve the problems that the verification code cannot be completely covered, lack of verification incentives, etc., and achieve the effect of high-efficiency verification

Active Publication Date: 2015-06-10
NO 771 INST OF NO 9 RES INST CHINA AEROSPACE SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this method is that after the compiler optimizes the binary code with the optimization strategy, the generated verification code cannot completely cover the design of the microprocessor, and there will be a lack of corresponding verification incentives on some paths.

Method used

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  • Microprocessor instruction set validation method
  • Microprocessor instruction set validation method
  • Microprocessor instruction set validation method

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Embodiment Construction

[0029] The present invention comprises the following steps:

[0030] Step 1, the monitoring program is loaded into the microprocessor, and the microprocessor is started to run the monitoring program;

[0031] Step 2. Classify the instruction sets supported by the microprocessor, and each type of instruction is determined by a set of parameters. For each type of instruction, design a code framework for instruction verification, and the instructions or instruction sequences that need to be verified are embedded in this code framework;

[0032] Step 3. Traversing the values ​​for each group of parameters according to the fetching range, generating a verified instruction or instruction sequence according to the combination of each group of parameter values, and embedding the instruction or instruction sequence into the verification code framework of step 2;

[0033] Step 4, load the verification code framework into the microprocessor, and send the protocol word to the monitoring ...

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Abstract

The invention provides a microprocessor instruction set validation method. The method comprises the steps of: loading a monitoring program in a microprocessor; classifying the instruction set supported by the microprocessor, embedding the instructions needing to be verified into a code framework; traversing each group of parameters, and embedding the instructions generating the verification into the verification code framework; loading the verification code framework in the microprocessor, inquiring a microprocessor verification termination protocol word, comparing the execution result with the expected result of execution of the instructions, if the result is correct, recording the comparison result in a log file, otherwise, outputting error information, and recording the error information in the log file. According to the microprocessor instruction set validation method, the defect of judging the validity of execution of the instructions only by analyzing the simulation waveform can be avoided, and the automatic and high-efficiency verification can be realized.

Description

technical field [0001] The invention relates to a verification method of a microprocessor instruction set, which is specifically used for the function verification of each stage of microprocessor design. Background technique [0002] Instruction set verification is critical in microprocessor design and runs through the entire design process. The more functions implemented by the instruction set definition, the higher the integration complexity of the circuit, and the greater the complexity and workload of the instruction set verification work. Designing an automated, portable, and high-coverage instruction set verification method is very important for design correctness, reliability, and shortening the time from chip design to tape-out. [0003] The traditional functional verification method is: manually write a large number of "instruction sequences" as verification incentives, apply them to the microprocessor design, view the waveforms through EDA software, and check the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F21/44G06F9/46
Inventor 曹辉杨靓卢强何卫强
Owner NO 771 INST OF NO 9 RES INST CHINA AEROSPACE SCI & TECH
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