Unlock instant, AI-driven research and patent intelligence for your innovation.

Apparatus and method for MOS transistor

A transistor and semiconductor technology, applied in the manufacture of transistors, semiconductor devices, semiconductor/solid-state devices, etc., can solve problems such as increased failure risk and short channel

Active Publication Date: 2014-01-22
TAIWAN SEMICON MFG CO LTD
View PDF5 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this shorter channel length may lead to short channel effects
More specifically, since the drain and source regions of the MOSFET are closer together, there may be an increased risk of punch-through failure

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Apparatus and method for MOS transistor
  • Apparatus and method for MOS transistor
  • Apparatus and method for MOS transistor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0038] The making and using of various embodiments of the invention are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable concepts that can be implemented in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.

[0039] The present disclosure will be described by way of embodiments in a specific context, namely, a lateral metal oxide semiconductor (MOS) device with stacked wells. However, embodiments of the present disclosure can be applied to various semiconductor devices.

[0040] figure 1A simplified cross-sectional view of a MOS transistor with a superimposed well is shown according to one embodiment. MOS transistor 100 includes a substrate 102 (preferably of P-type), a first P-type region 104 formed in the substrate 102 , and a second P-type region 106 . More specifically...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A MOS transistor comprises a substrate of a first conductivity, a first region of the first conductivity formed over the substrate, a second region of the first conductivity formed in the first region, a first drain / source region of a second conductivity formed in the second region, a second drain / source region of the second conductivity and a body contact region of the first conductivity, wherein the body contact region and the first drain / source region are formed in an alternating manner from a top view. The present invention also provides an apparatus and method for MOS transistors.

Description

technical field [0001] The present invention relates to the field of semiconductors, and more particularly, the present invention relates to a device and method for MOS transistors. Background technique [0002] The semiconductor integrated circuit (IC) industry has experienced rapid growth due to the development of integration density of various electronic components (eg, transistors, diodes, resistors, capacitors, etc.). In most cases, this development in integration density stems from the shrinking of semiconductor process nodes (for example, shrinking process nodes closer to the sub-20nm node). Semiconductor devices are being scaled down, requiring new technologies to maintain the performance of electronic components from one generation to the next. For example, low gate-drain capacitance and high breakdown voltage of transistors are desired for power applications. [0003] With the development of semiconductor technology, metal oxide semiconductor field effect transis...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/78H01L27/088H01L29/06
CPCH01L27/088H01L27/092H01L29/7833H01L29/0638H01L21/761H01L29/66659H01L29/7835H01L29/0852H01L29/0623H01L29/0653H01L29/0696H01L29/1083H01L29/1095H01L29/7816
Inventor 周学良伍震威苏柏智柳瑞兴
Owner TAIWAN SEMICON MFG CO LTD