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3D vertical NAND and method of making thereof by front and back side processing

A technology for controlling gates and semiconductors, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., and can solve problems such as time-consuming processes and difficulties

Active Publication Date: 2014-03-05
SANDISK TECH LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, the active region of the NAND string is formed through a relatively difficult and time-consuming process, including repeated formation of sidewall spacers and etching a portion of the substrate, which results in a roughly conical active region shape

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  • 3D vertical NAND and method of making thereof by front and back side processing
  • 3D vertical NAND and method of making thereof by front and back side processing
  • 3D vertical NAND and method of making thereof by front and back side processing

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Embodiment approach

[0014] Embodiments include monolithic three-dimensional NAND strings and methods of fabricating three-dimensional NAND strings. The method includes both front-side and back-side processes, which will be explained below. Using a combination of front-side and back-side processes, NAND strings can be formed to include air gaps between floating gates in the NAND strings. In an embodiment, a NAND string may be formed with a single vertical channel. On the one hand, the vertical channel has a solid rod shape, such as figure 1 shown. In this regard, the entire channel comprises semiconductor material. On the other hand, the vertical channel has a hollow cylindrical shape such as figure 2 shown. In this regard, the vertical channel includes a non-semiconducting core surrounded by a semiconducting channel shell. The core can be unfilled, or filled with an insulating material such as silicon oxide or silicon nitride. Alternatively, the NAND string may have a U-shape (also known ...

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Abstract

Monolithic three dimensional NAND strings and methods of making. The method includes both front side and back side processing. Using the combination of front side and back side processing, a NAND string can be formed that includes an air gap between the floating gates in the NAND string. The NAND string may be formed with a single vertical channel. Alternatively, the NAND string may have a U shape with two vertical channels connected with a horizontal channel.

Description

[0001] related application [0002] This application claims the benefit of priority to US Application Serial No. 13 / 083,775, filed April 11, 2011, which is hereby incorporated by reference in its entirety. technical field [0003] The invention relates to the field of semiconductor devices, in particular to three-dimensional vertical NAND strings and other three-dimensional devices and their manufacturing methods. Background technique [0004] Three-dimensional vertical NAND strings are disclosed in T.Endoh et al. entitled "Novel Ultra High Density Memory With A Stacked-Surrounding Gate Transistor (S-SGT) Structured Cell )", IEDM Proc. (2001) 33-36 article. However, this NAND string only provides one bit per cell. In addition, the active region of the NAND string is formed through a relatively difficult and time-consuming process, including repetitive formation of sidewall spacers and etching a portion of the substrate, which results in a roughly conical active region shap...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/792H01L29/788H01L27/115H01L21/764H01L29/66H01L21/336H01L21/8247H10B69/00
CPCH01L27/11556H01L29/7926H01L29/7889H01L27/11582H01L21/764H10B41/27H10B43/27H01L21/823487
Inventor J.阿尔斯梅尔
Owner SANDISK TECH LLC
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