Hardware structure for realizing SVC macroblock-level algorithm
A technology of hardware structure and algorithm, applied in electrical components, digital video signal modification, image communication, etc., can solve problems such as low coding efficiency and insufficient utilization of hardware performance.
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[0014] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings.
[0015] figure 1 It is a schematic diagram of a hardware structure for realizing the SVC macroblock-level algorithm in the embodiment of the present invention. Such as figure 1 As shown, the hardware structure includes: a memory, an arbitration (Arbitrate) module, a data reading (Read Data) module, a prediction (Prediction) module, and a sending data (Send Data) module.
[0016] Wherein, the memory stores the basic layer data, and the data reading module, the predicting module, and the data sending module need to access the memory at the same time or at different times to obtain corresponding data, or store the processed data in the memory. In an embodiment of the present invention, the memory may be implemented by SRAM (Static Random Access Memory).
[0017] Th...
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