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An all-digital fractional frequency-division phase-locked loop structure

A technology of fractional frequency division and phase-locked loop, applied in automatic control of power, electrical components, etc., can solve problems such as poor noise, high power consumption, and complex design, and achieve simplified design, reduced effective length, and reduced complexity Effect

Active Publication Date: 2019-05-07
PEKING UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This structure not only reduces the complexity of circuit design, but also solves the problems of high power consumption, complex design, and poor noise in the existing structure.

Method used

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  • An all-digital fractional frequency-division phase-locked loop structure
  • An all-digital fractional frequency-division phase-locked loop structure
  • An all-digital fractional frequency-division phase-locked loop structure

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Embodiment Construction

[0043] Below by specific embodiment, and cooperate with accompanying drawing, the present invention will be further described:

[0044] Such as Figure 5 As shown, it is an all-digital fractional frequency-division phase-locked loop structure provided by an embodiment of the present invention. It includes:

[0045] Time-to-digital converter TDC, digital filter DLF, numerically controlled oscillator DCO, numerically controlled phase interpolator DPI, ΣΔ modulator SDM, integer frequency divider DIV and feedforward correction module;

[0046] The TDC is used to convert the phase and output it as a digital signal, and its input terminals input the reference clock and the feedback clock respectively; sample the reference clock according to the rising edge of the feedback clock, and compare the phases of the sampled data to obtain the feedback clock The phase difference between the signal and the reference clock signal, and convert it into a multi-bit digital signal output.

[00...

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Abstract

The invention provides an all-digital fractional-N phase-locked loop structure comprising a time-digital converter TDC, a digital filter DLF, a digital-controlled oscillator DCO, a digital-controlled phase interpolator DPI, a sigmadelta modulator SDM, an integer frequency divider DIV and a feedforward correction module. Conversion from digital control signals to phase information is completed by using the digital-controlled phase interpolator DPI, and the nonlinearity brought by the DPI can be eliminated by using the feedforward correction means. According to the structure, the complexity of the circuit design can be reduced, and the problems of high power consumption, complex design and poor noise in the existing structure can also be solved so that the structure is suitable for the field of high-performance and low-power-consumption wireless communication.

Description

technical field [0001] The invention relates to an all-digital fractional frequency-division phase-locked loop structure, which belongs to the field of radio frequency integrated circuits. Background technique [0002] In recent years, wireless communication technology has developed rapidly, and with the development of integrated circuits, wireless communication has spread to every corner of life. In a wireless communication system, a frequency synthesizer is the core module in a radio frequency system, which generates a stable local oscillator signal (LO) for use by receivers and transmitters. The frequency synthesizer based on the phase-locked loop (PLL) structure has received continuous attention due to its simple structure, stable performance, low implementation cost, and easy integration with large-scale analog and digital circuits, and has been widely used in modern communications. Applications. [0003] Generally, phase locked loops can be classified into integer ph...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03L7/197
CPCH03L7/1974H03L2207/50
Inventor 刘军华郭航燕杨帆廖怀林
Owner PEKING UNIV
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