Exposure method and pixel structure for pulse width modulation pixel
A technology of pulse width modulation and exposure method, which is applied in the field of image sensors, can solve the problems of poor dynamic range performance of pulse width modulation pixels and achieve ultra-low power consumption
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Embodiment 1
[0037] This embodiment provides a pulse width modulation pixel exposure method, the pulse width modulation pixel includes a photodiode, and the method includes the following steps:
[0038] When performing an exposure operation of a pulse width modulated pixel, the photodiode is first reset to a reset voltage. Under illumination, the node voltage of the photodiode decreases linearly with a slope related to the intensity of light. At this time, the node voltage of the photodiode is compared with two reference voltages with different levels to obtain two sets of pixel signals. Due to the digital characteristics of the output signal, the two groups of pixel signals can be synthesized and output on the same column line.
[0039] As a preferred solution of the present invention, two comparators can be used to compare the node voltage of the photodiode with two reference voltages of different heights, and obtain two sets of pixel signals in the same exposure period.
[0040] As a p...
Embodiment 2
[0042] see figure 1 , this embodiment provides a pulse width modulation pixel structure that can implement the above exposure method. The structure includes: a photodiode PD, a reset transistor M1, a first comparator B1, a second comparator B2, a control switch K1, a combined circuit and a counter.
[0043] Wherein, one end of the reset transistor M1 is connected to the power supply VDD, the other end is connected to the reverse input end of the photodiode PD, and the gate is connected to the reset signal Rst; the positive input end of the photodiode PD is grounded; the first The input terminal of a comparator B1 is respectively connected to the node voltage of the photodiode PD and the first reference voltage RefH, and the output terminal of the first comparator B1 is connected to the combination circuit through the control switch K1; the The input terminal of the second comparator B2 is respectively connected to the node voltage of the photodiode PD and the second reference...
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