Audio and video synchronous processing method and device
A technology of audio and video synchronization and video frame, which is applied in image communication, selective content distribution, electrical components, etc., and can solve problems such as lip synchronization
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Embodiment 1
[0089] see figure 2 , which shows a method for audio and video synchronization processing provided by an embodiment of the present invention, the method comprising:
[0090] S101. Compare the current program clock reference PCR value with the current system clock STC value to obtain a first comparison result.
[0091] see image 3 , specifically, step S101 includes steps S1011 to S1014:
[0092] S1011. Load the first PCR value or the reloaded PCR value into the local STC counter as an initial count value.
[0093] It should be noted that when the first PCR arrives or the PCR needs to be reloaded, the current PCR value is loaded into the local STC counter as the initial count value. The local STC counter is also divided into STC_base and STC_extension to count separately; among them, STC_base is the basic value of STC, which is the high 33bit of STC, and the initial value is PCR_base, and then counts up under the drive of 90kHz clock, mainly used for PTS and DTS Compare to...
Embodiment 2
[0149] see Figure 9 , which shows an audio-video synchronization processing device 9 provided by an embodiment of the present invention, the device includes: a comparison module 901 and an adjustment module 902; wherein,
[0150] The comparison module 901 is configured to compare the current program clock reference PCR value with the current system clock STC value to obtain a first comparison result;
[0151] The adjustment module 902 is configured to rebuild the system clock STC by adjusting the current STC count step size when the first comparison result does not meet the preset judgment condition;
[0152] The comparison module 901 is further configured to compare the absolute value of the difference between the STC base value STC_base in the reconstructed system clock STC and the display time tag PTS value with a preset time interval to obtain a second comparison result ; Wherein, the preset time interval is M times the time between audio or video frames, and M is greate...
Embodiment 3
[0179] against Figure 9 device shown, see Figure 11 , which shows the hardware implementation device involved in the reconstruction of the system clock and the audio and video synchronization processing provided by the embodiment of the present invention. The hardware implementation device may specifically include three parts: CPU, demultiplexer demux and decoder decoder .
[0180] The demultiplexer demux is divided into a ts_ph_get module and a PCR_recovery module, wherein the ts_ph_get module performs packet header analysis, extracts PCR_flag and PCR values from the adaptive area of the MPEG2-TS stream, and sends them to the PCR_recovery module to rebuild the system clock.
[0181] The PCR_recovery module saves the PCR value. Specifically, when the local STC counter deviates from the local system clock, the STC step can be adjusted by the CPU to adjust the STC counter so that it is basically consistent with the current PCR. The PCR_recovery module sends the pcr_inter...
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