Power device protective chip and preparation method thereof

A technology for protecting chips and power devices, which is applied in the field of power device protection chips and its preparation, can solve the problems of large circuit signal attenuation, affecting circuit stability, etc., and achieve the effects of reducing parasitic capacitance, reducing manufacturing costs, and reducing conduction loss

Active Publication Date: 2019-02-01
SHENZHEN MYD INFORMATION TECH CO LTD
View PDF3 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In high-frequency circuits, because the surge protection chip also has parasitic capacitance, the sign...

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Power device protective chip and preparation method thereof
  • Power device protective chip and preparation method thereof
  • Power device protective chip and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0026] In order to understand the specific technical solutions, features and advantages of the present invention more clearly, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0027] In the description of the present invention, it should be noted that the terms "upper", "lower", "left", "right", "transverse", "longitudinal", "horizontal", "inner", "outer" etc. indicate The orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship that is usually placed when the product of the invention is used, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying the It should not be construed as limiting the invention that a device or element must have a particular orientation, be constructed, and operate in a particular ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a power device protective chip which comprises a substrate, a first epitaxial layer formed on the substrate, rectification areas formed in the first epitaxial layer separately,and an isolation area positioned between the two rectification areas and extending from the upper surface of the first epitaxial layer to the substrate; each rectification area comprises a first trench formed from the upper surface of the first epitaxial layer to the first epitaxial layer, a second trench formed from the bottom of the first trench to the first epitaxial layer, and a third trench formed the bottom of the second trench to the first epitaxial layer, the first, second and third trenches are communicated, the widths of the first, second and third trenches are decreased successively, and Schottky barrier heights between metal layers in the first, second and third trenches and the first epitaxial layer are reduced successively; and the isolation area comprises a fourth trench, aninjection region positioned in the bottom of the fourth trench and a second epitaxial layer formed in the fourth trench. The invention also provides a preparation method of the power device protective chip. The reliability is improved, the packaging area is reduced, and the cost is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor chip manufacturing technology, in particular to a power device protection chip and a preparation method thereof. Background technique [0002] As semiconductor devices become increasingly smaller, denser, and more versatile, electronic devices are increasingly susceptible to voltage surges, which can induce transient current spikes in everything from electrostatic discharge to lightning. Electrostatic discharge (ESD) and other random voltage transients in the form of voltage surges exist in a variety of electronic devices. [0003] Surge protection chip is a solid-state semiconductor device specially designed to protect sensitive semiconductor devices from transient voltage surge damage. It has small clamping coefficient, small size, fast response, small leakage current and reliable High performance, so it has been widely used in voltage transient and surge protection. Based on different a...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L27/02H01L21/8222
CPCH01L21/8222H01L27/0255H01L27/0296
Inventor 不公告发明人
Owner SHENZHEN MYD INFORMATION TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap