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A dynamic image processing system and image processing method

A technology for processing systems and dynamic images, which is applied in the field of image processing, can solve the problems of cumbersome control methods, reduce image processing efficiency, and reduce the integration of processing systems, etc., achieve the effect of simplifying the structure, ensuring real-time effectiveness, and improving processing capabilities

Active Publication Date: 2022-03-29
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT +1
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The system using this processing method needs to add additional crystal arrays and control centers, which reduces the integration of the entire processing system, and the control method is cumbersome, which reduces the efficiency of image processing

Method used

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  • A dynamic image processing system and image processing method

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Embodiment Construction

[0022] In order to make the purpose, technical solution and advantages of the present invention clearer, the specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0023] as attached figure 1 As shown, a dynamic image processing system provided by the present invention includes an image sensor and an FPGA connected to each other. The image sensor includes a register module and an image generation module. The image generation module is used to generate images, and M types of register patterns are stored in the register module. Wherein, the image sensor may specifically use an ISA8201 chip.

[0024] The FPGA includes a clock module, a configuration module and a receiving processing module. The receiving processing module is used to receive the image sent by the image generating module and process it. Both the register module and the clock module are connected to the image generating modu...

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Abstract

A dynamic image processing system and an image processing method disclosed in the present invention include an image sensor and an FPGA connected to each other, the image sensor includes a register module and an image generation module, the image generation module is used to generate images, and M types of register modes are stored in the register module FPGA comprises a clock module, a configuration module and a receiving processing module, and the receiving processing module is used to receive the image sent by the image generation module and process it, store M clock patterns in the clock module, and store M kinds of configuration patterns in the configuration module; wherein , M register modes, M clock modes, and M configuration modes correspond one-to-one. A dynamic image processing system and image processing method provided by the present invention, by dynamically configuring the FPGA and the image sensor, through the function of the configuration module in the FPGA, the transmission frame rate of the image sensor and the processing rate of the FPGA are changed successively in a very short time , thereby improving the processing capability of the FPGA to the image sensor.

Description

technical field [0001] The invention relates to the field of image processing, in particular to a dynamic image processing system and an image processing method. Background technique [0002] With the development of image processing technology, image sensors are used more and more, especially in the industrial field, the steps of machine vision replace most of the manual work; and in the industrial field, machine vision generally uses industrial cameras, industrial cameras It includes an image sensor and an image processing module. In the prior art, the image processing module generally uses FPGA to collect and process images, and the images processed by FPGA are then passed through interfaces (such as USB interface, CameraLink, Gigabit Ethernet interface, etc.) output. [0003] In the existing image processing system, the image sensor keeps the output frame rate of the FPGA fixed, that is, the image sensor keeps a fixed frame rate to transmit images to the FPGA, and the FP...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N5/335H04N5/343H04N5/355H04N25/00H04N25/42
CPCH04N25/772H04N25/42H04N25/57
Inventor 叶红磊温建新叶红波张悦强蒋亮亮姚清志王凯张嘉泉
Owner SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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