A device access method, device and readable storage medium

Abstract

The present application discloses a device access method, comprising: receiving a device access command by a PCIe expansion switch chip; determining the device number of the device to be accessed according to the device access command; wherein, the device number includes a bus number, a device number and a function number; Find the domain address corresponding to the device number in the relationship table; determine the location of the device to be accessed according to the domain address, and access the device to be accessed. This application finds the domain address corresponding to the device number of the device to be accessed in the domain relationship table, then determines the location of the device to be accessed according to the domain address, and accesses the device to be accessed without addressing the intermediate port and sub-bus Finding the address of the device to be accessed reduces the number of bus numbers required by intermediate ports and sub-buses, and improves the access efficiency of PCIe bus devices. At the same time, the present application also provides a device for accessing equipment and a readable storage medium, which have the above beneficial effects.

Description

technical field [0001] The present application relates to the field of device access, in particular to a device access method, device and readable storage medium. Background technique [0002] In the hardware architecture of the data center, the PCIe (peripheral component interconnect express, a high-speed serial computer expansion bus standard) bus is used as the backbone bus for high-speed IO of storage and servers, and its specification has become a key shaping factor affecting the hardware architecture and hardware device topology. BDF is the addressing mode specified in the PCIe specification. It means that the Bus Number occupies 8 bits, the Device Number occupies 5 bits, and the Function Number occupies 3 bits. That is, the PCIe bus supports a maximum of 256 sub-buses, and each sub-bus supports a maximum of 32 devices. A device supports up to 8 functions. [0003] However, as the performance of general-purpose computing / storage devices continues to improve, and the a...

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Problems solved by technology

[0003] However, with the continuous improvement of the performance of general-purpose computing / storage devices, the application of PCIe buses and devices in devices has become more and more complex, and the limitation of the number of bus numbers in the PCIe specification has become an important obstacle restricting the development of devices.

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