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dual port sram

A dual-port, port-structure technology, applied in static memory, instruments, etc., can solve the problem of slow reading speed and achieve the effect of improving the reading symmetry

Active Publication Date: 2022-05-27
SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0027] It can be seen that the path of the current Iread1 to Iread4 is not a symmetrical structure, which will make the current Iread2 and Iread4 smaller than the current Iread1 and Iread3, and the corresponding reading speed will also be slower

Method used

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Experimental program
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Embodiment Construction

[0078] Please also refer to the circuit diagram of the SRAM cell structure of the dual-port SRAM according to the embodiment of the present invention figure 1 shown, as Figure 5 shown, is the superimposed structure layout of the lower layer of the SRAM cell structure of the dual-port SRAM of the embodiment of the present invention and the first layer of metal layer 4; the SRAM cell structure of the dual-port SRAM of the embodiment of the present invention includes: A port structure and a second port structure.

[0079] The main structure of the data storage unit is formed by cross-coupling connection of a first inverter and a second inverter, and forms a first storage node node1 and a second storage node node2 which are mutually inverse.

[0080] The first port structure includes a first selection transistor PG1 and a second selection transistor PG2, and the second port structure includes a third selection transistor PG3 and a fourth selection transistor PG4.

[0081] The p...

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Abstract

The invention discloses a dual-port SRAM, in which four selection transistors corresponding to two ports of the SRAM unit structure are arranged symmetrically in the layout, and two selection transistors corresponding to the same storage node and belonging to different ports are arranged on the same In the active area, this enables the reading paths corresponding to different storage nodes to be symmetrical and the same without including polysilicon lines. The invention can make the reading path of each port to two storage nodes a symmetrical structure, so that the reading current and reading speed of each port to the two storage nodes are symmetrical and consistent, and the reading speed of the dual-port SRAM is improved. symmetry.

Description

technical field [0001] The present invention relates to a semiconductor integrated circuit, in particular to a dual-port static random access memory (SRAM). Background technique [0002] SRAM includes an array structure arranged by a plurality of SRAM cell structures. In a dual-port SRAM, each SRAM cell structure has two port structures. Each SRAM cell structure can be read and written through the two port structures. The setting enables parallel operations on two different rows. like figure 1 is the circuit diagram of the SRAM cell structure of the existing dual-port SRAM, figure 1 The SRAM cell structure in is an 8T type structure composed of 8 transistors. The SRAM cell structure of the dual-port SRAM includes: a main body structure of a data storage unit, a first port (Port) structure and a second port structure, figure 1 , the first port is also the A port, and the second port is also the B port. [0003] The main structure of the data storage unit is formed by cro...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C5/02G11C5/06
CPCG11C5/025G11C5/063
Inventor 陈品翰吴栋诚贾经尧
Owner SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD