Low-voltage SAR ADC switch switching method based on charge recovery

Abstract

The invention discloses a low-voltage SAR ADC (Synthetic Aperture Radar Analog-to-Digital Converter) switch switching method based on charge recovery, which comprises the following steps: sampling stage differential input signals Vip and Vin are connected to top polar plates of P-end and N-end capacitor arrays through sampling switches, reference voltages Vref and gnd are connected to bottom polarplates of P-end and N-end corresponding capacitors, the capacitor arrays are pre-charged; and the sampling switches are disconnected in the transforming stage. the comparator compares the voltages ofthe top electrode plates of the P-end capacitor array and the N-end capacitor array from the MSB bit to the LSB bit in sequence to obtain digital codes of corresponding bits, floating and voltage switching of corresponding capacitors of the P-end capacitor array and the N-end capacitor array are controlled according to the digital codes, and a binary search algorithm is completed. According to the invention, 100% capacitor array switching energy can be saved, extra third reference voltage does not need to be generated, the circuit is suitable for design under near threshold voltage, in a conversion stage, common-mode voltage of top polar plates of the P-end capacitor array and the N-end capacitor array is always kept constant, and the design difficulty of a comparator is reduced.

Description

technical field [0001] The invention relates to the technical field of capacitor arrays, in particular to a charge recovery-based low-voltage SAR ADC switching method. Background technique [0002] Because of its excellent energy efficiency, SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is widely used in fields such as biomedical electronics and wireless sensor network nodes. In medium and high-precision SAR ADCs, the power consumption of the capacitor DAC accounts for a large proportion of the overall power consumption of the SAR ADC. [0003] In the existing research, a variety of switching algorithms are proposed to reduce the switching power consumption of the capacitor DAC. Among them, since the three-level switching algorithm introduces a third reference level, which is generally 0.5Vref, the switching algorithm is more flexible, and the switching power consumption of the DAC is often lower. However, this requires the SAR ADC to additionally...

AI Technical Summary

Problems solved by technology

[0004] In most of the switching algorithms that have been proposed, if the reference level of the capacitor DAC is Vref, the quantizable differential input signal range is [-Vref, Vref], and there is no way to quantize a larger differential input signal

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