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Hardware pin jitter test system, method and device

A testing method and testing device technology, applied in the direction of electrical connection testing, etc., can solve the problems of undetectable hardware influence of pin pins, difficult pin pin testing, etc., and achieve the effect of convenient and fast testing

Active Publication Date: 2021-03-19
SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, after the hardware pin process is completed, it is difficult to test the pins on the hardware, and which pins are tested for jitter, which pins are most likely to cause problems, how to set the duration of jitter, waveform shape, cycle, etc. , and how the jitter of the pin will affect the hardware cannot be detected

Method used

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  • Hardware pin jitter test system, method and device
  • Hardware pin jitter test system, method and device

Examples

Experimental program
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Embodiment 1

[0034] Such as figure 1 and 2 As shown, this embodiment provides a hardware pin jitter test system, including an adapter board 1 , a first power control module 4 , a second power control module 6 , and a controller 5 .

[0035] During the test, the pins of the hardware are plugged into the device to be plugged (such as a server) through the adapter board 1 , and the controller 5 controls the vibration of the hardware pins through the adapter board 1 .

[0036] Specifically, the adapter board 1 is provided with a slot 101 and an adapter pin 102. The adapter pin 102 corresponds to the hardware pin one-to-one and has the same structure, so as to be inserted into the device to be inserted. There is a jack 103 for inserting the hardware pin. When in use, the hardware pin is inserted into the slot 101, and then when the transfer pin 102 is inserted into the device to be inserted, the hardware pin is connected to the device to be inserted through the adapter board 1 Connection. Th...

Embodiment 2

[0040] Such as image 3 As shown, based on the system of Embodiment 1, a hardware pin jitter testing method of the system of this embodiment comprises the following steps:

[0041] S1, set pin shake data;

[0042] The set pin jitter data includes the power-on delay time of each pin of the hardware, the jitter frequency and the jitter duration during power-on.

[0043] It should be noted that the tester sets the jitter data of each pin according to the test needs, and can set any jitter data to detect the impact of different jitters on the hardware.

[0044] In addition, the hardware pins can be grouped according to certain rules, and the pin jitter data can be set for each group. For example, the long and short needles of the pins, the long needle first contacts the device to be inserted, and the short needle then contacts the device to be inserted, and the pins are grouped according to the length and short needle.

[0045] S2, sending the set pin jitter data to the control...

Embodiment 3

[0053] Such as Figure 4 As shown, based on the system of Embodiment 1, the system of this embodiment is a hardware pin jitter testing device, which includes the following functional modules.

[0054] (1) Jitter data setting module 101: set the pin shake data;

[0055] The set pin jitter data includes the power-on delay time of each pin of the hardware, the jitter frequency and the jitter duration during power-on.

[0056] It should be noted that the tester sets the jitter data of each pin according to the test needs, and can set any jitter data to detect the impact of different jitters on the hardware.

[0057]In addition, the hardware pins can be grouped according to certain rules, and the pin jitter data can be set for each group. For example, the long and short needles of the pins, the long needle first contacts the device to be inserted, and the short needle then contacts the device to be inserted, and the pins are grouped according to the length and short needle.

[0...

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PUM

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Abstract

The invention discloses a hardware pin jitter test system, method and device. A pin of hardware is inserted into to-be-inserted equipment through an adapter plate, the circuit on the adapter plate iscontrolled to be connected based on set jitter data so as to simulate the jitter state of the pin, and the hardware state under various jitter data is detected at the same time. The system, the methodand the device are convenient to test, can simulate manual power-on and power-off operation, and quickly detects the impact on hardware from pin jittering.

Description

technical field [0001] The invention relates to the field of hardware pin testing, in particular to a hardware pin vibration testing system, method and device. Background technique [0002] When the hardware (such as SSD) on the server is powered on and off, because it is manually inserted and pulled out, it will cause intermittent jitter when the pins of the hardware are in contact with the server during the power on and off process. The generation of these jitters is caused by all pins or some pins, and the duration of these jitters, the shape of the waveform, the cycle, etc. will have a certain impact on the hardware when it is powered on and off. In severe cases, it will affect whether the hardware can operate recognized on the server. [0003] At present, after the hardware pin process is completed, it is difficult to test the pins on the hardware, and which pins are tested for jitter, which pins are most likely to cause problems, how to set the duration of jitter, wav...

Claims

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Application Information

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IPC IPC(8): G01R31/70
CPCG01R31/70
Inventor 高静
Owner SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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