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SAS controller frame buffer structure design method

A frame buffer and structure design technology, applied in the direction of CAD circuit design, special data processing applications, etc., can solve the problem of undefined frame buffer unit structure, etc., and achieve the effect of efficient management

Active Publication Date: 2022-02-08
无锡众星微系统技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the existing SAS protocol does not define the frame buffer unit structure to support efficient data communication of the SSP (Serial SCSI Protocol, sub-protocol of the SAS standard) and SMP (Serial Management Protocol, sub-protocol of the SAS standard) protocol types

Method used

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  • SAS controller frame buffer structure design method
  • SAS controller frame buffer structure design method
  • SAS controller frame buffer structure design method

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Embodiment Construction

[0042] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0043] In a typical SAS data storage topology, the SAS controller supports concurrent control and management of multi-disk devices through one-level or multi-level Expander (expander). according to figure 2 In the SAS standard protocol shown, before the SAS controller or SAS disk device transmits the SSP protocol data, the l...

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Abstract

The invention provides a method for designing a frame buffer structure of a SAS controller, comprising: adopting an asymmetrical buffer structure design in two directions of sending and receiving; Slot; set the status word, device description word, frame header, data and delimiter segment in each slot of the frame receiving buffer; set the control descriptor, data and delimiter segment in each slot of the frame sending buffer; When the SAS controller receives a data frame, write the parsed OAF frame content into the device description word of the frame receiving buffer, and write the frame exception information into the status word; when the SAS controller sends a data frame, read the frame Send the control descriptor of the corresponding storage slot in the buffer, and generate the OAF frame according to the field of the control descriptor. The invention effectively supports multi-disk and multi-I / O concurrent data communication under SMP and SSP protocol types, supports efficient management of multi-disk devices by SAS controller and diagnosis of various abnormalities in links.

Description

technical field [0001] The invention belongs to the technical field of disk connection, in particular to a method for designing a frame buffer structure of a SAS controller. Background technique [0002] SAS (Serial Attached SCSI) is a high-speed serial interface, adopts point-to-point transmission mode, built-in data / command verification unit, strong error correction ability, supports hot swap, has a small number of pins, fast and reliable data transmission rate Features such as high performance and good compatibility are widely used in the industry as the main I / O interface between storage devices and hosts. [0003] In order to complete the high-speed transmission of end-to-end data, the SAS standard protocol defines different protocol stack levels to realize data encapsulation, encoding and conversion of high-speed interface physical signals. figure 1 A typical controller implementation device supporting the SAS standard protocol in the prior art is described, which mai...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/33
CPCG06F30/33
Inventor 宫晓渊王俊李越峰杨亮
Owner 无锡众星微系统技术有限公司