Array substrate, preparation method thereof and display panel
An array substrate and plane technology, applied in nonlinear optics, instruments, optics, etc., can solve the problems of reducing display effect and affecting the quality of display products, so as to improve the image display effect, avoid abnormal liquid crystal deflection, and solve pitting defects Effect
Pending Publication Date: 2021-06-18
BOE TECH GRP CO LTD +1
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Problems solved by technology
In low-to-medium grayscale screens, small gray dots often appear on the display screen of high-resolution display products, also known as pitting defects, which seriously affects the quality of display products and reduces the display effect.
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[0042]The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0043] In the embodiments of the present invention, unless otherwise specified, the meanings of "multiple" and "multiple" are two (bars) or more than two (bars); Based on the orientation or positional relationship shown in the drawings, it is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the structure or element referred to must have a specific orientation, be constructed and ope...
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The invention provides an array substrate, a preparation method thereof and a display panel, and relates to the technical field of display. The array substrate comprises sub-pixels arranged in an array, each sub-pixel comprises a connecting electrode, an insulating layer and a pixel electrode, the pixel electrode comprises a first sub-electrode, a plurality of second sub-electrodes and a third sub-electrode, and the insulating layer is provided with a first via hole; the first sub-electrode is connected with the connecting electrodes through the first via holes, and a slit is formed between every two adjacent second sub-electrodes; each slit is provided with a first end facing the first sub-electrode, the first end of the first slit and the area of the first sub-electrode extending along the first direction have an overlapping area, and the first end of the second slit and the extending area do not have an overlapping area; the distance from the first end of at least one first slit to the plane where the side, away from the second sub-electrode, of the first sub-electrode is located is smaller than the distance from the first end of the second slit to the plane where the side, away from the second sub-electrode, of the first sub-electrode is located. The array substrate provided by the invention can improve the pocking mark undesirable phenomenon.
Description
technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a preparation method thereof, and a display panel. Background technique [0002] With the rapid development of display technology, high-resolution display products have attracted widespread attention. In low-to-medium gray-scale screens, small gray dots often appear on the display screen of high-resolution display products, also known as pitting defects, which seriously affects the quality of display products and reduces the display effect. [0003] At present, it is urgent to provide a new array substrate to solve the above problems. Contents of the invention [0004] Embodiments of the present invention provide an array substrate, a manufacturing method thereof, and a display panel. The array substrate can improve pitting defects and improve display effects. [0005] In order to achieve the above object, embodiments of the present invention adop...
Claims
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Login to View More IPC IPC(8): G02F1/1343G02F1/1362
CPCG02F1/134309G02F1/1362G02F1/136286
Inventor 陈俊明王小元吴忠山杨国栋万彬刘艳雷丹
Owner BOE TECH GRP CO LTD