A Multiplier Based on Booth Coding Bit Extension and Its Realization Method

Abstract

The invention discloses a multiplier based on Booth coding bit extension and a realization method thereof. The multiplier includes an absolute value calculation module, a Booth coding module, a bit extension module, a partial product generation module and an output module. The steps of the method for realizing the multiplier include: (1) calculating the absolute value of the input digital filter signal; (2) carrying out Booth coding to the digital filter coefficient; (3) carrying out bit extension to the digital filter coefficient; (4) Calculate the unsigned bit multiplication product; (5) determine the sign bit of the operation result. The multiplier of the invention has the advantages of small occupation of hardware resources and good portability. The method of the invention can improve computing efficiency through Booth encoding and bit extension operations, and can be flexibly used in different programmable logic devices.

Description

technical field [0001] The invention belongs to the technical field of physics, and further relates to a multiplier based on Booth coding bit expansion and a realization method in the technical field of integrated circuits. The invention can be used for multiplication operation of digital filter coefficients in integrated circuits. Background technique [0002] In the analog-to-digital conversion chip, it usually involves filtering, detecting, converting, etc. of the signal, all of which use digital filters. In general, a digital filter consists of a multiplier, an adder, and a delay unit. The multiplier is a constant coefficient multiplier, that is, the multiplier of the two operands is fixed, and the other operand comes from the front-stage signal path of the digital filter, and its positive or negative value is uncertain. The traditional hardware multiplier uses shift and addition operations to realize multiplication, and the multiplier and multiplicand are expressed in...

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Problems solved by technology

[0005] The object of the present invention is to aim at the deficiencies in the above-mentioned prior art, and propose a multiplier based on Booth coding bit expansion and its implementation method, which are used to solve the problems of poor portability, low operation efficiency, and low resource utilization of the existing multiplier in the prior art. The problem of taking too much

Through the bit expansion module, the data "-1" in the digital filter coefficient that cannot be processed by the programmable logic device after Booth encoding is extended to make the data "-1" a binary data that can be processed by the programmable logic device. This solves the problem of poor portability of digital filter coefficients after Booth coding

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