10 results about "Bus encoding" patented technology

The application provides a bus encoder and an integrated circuit chip. The bus encoder comprises: a bus encoder, which comprises a master chip and an identification circuit; the identification circuit is connected with the master chip, is used for receiving an input signal, and outputs a corresponding protocol signal to the master chip according to whether the input signal comprises a predetermined time sequence; wherein the predetermined time sequence comprises, in sequence, two continuous low levels, one high level and one low level; and the master chip is used for determining whether the input signal adopts a multi-mochuan communication protocol according to the protocol signal, and performing processing on the input signal under a corresponding communication protocol. The application is used to support two bus protocols and improve the flexibility of the bus encoder.

This application relates to the field of intelligent connected vehicles, and provides a variable-rate OTA upgrade method, device, and VBOX. The method includes: sending a first message frame to a target ECU at a first master control bus rate; determining a second slave control bus rate and a second master control bus code based on a first slave control load rate and a first slave control bus rate extracted from a first response message; sending the second slave control bus code to the target ECU to cause the target ECU to adjust the first slave control bus rate to a second slave control bus rate corresponding to the second slave control bus code; adjusting the first master control bus rate to a second master control bus rate consistent with the second slave control bus rate; and sending a second message frame to the target ECU at the second master control bus rate. This application can achieve variable-rate data transmission and upgrade flashing based on the ECU's flashing capability and load rate, thereby achieving optimal upgrade flashing with high efficiency.

The invention belongs to the field of digital signal processing and digital integrated circuits, and particularly relates to a debugger circuit board capable of customizing a communication protocol for high-frequency data processing of a bus encoder and upper computer software of the debugger circuit board, which can realize communication debugging of encoders with common interfaces such as RS485, SSI, BiSS-C, ABZ, USB and the like. Simple hardware design operation display can be realized through the touch panel, data uploading and detailed data display can be realized through USB connection with an upper computer, communication protocol editing and hardware writing can be realized, high-frequency signals of an encoder can be pre-processed by the hardware, the application to different encoder communication protocols is realized, the operation is visual and convenient, the carrying is convenient, and the application range is wide. The method is high in adaptability and suitable for debugging in various occasions.

The application relates to a distributed encoder system. The system comprises: a plurality of encoder sensors configured to output encoded sensing signals; a plurality of bus encoder modules, one of which is connected with one or more of the encoder sensors, configured to receive the encoded sensing signals of the connected encoder sensors, pre-process the encoded sensing signals to obtain encoded sampling signals, and publish the encoded sampling signals onto an industrial real-time bus; and a plurality of processing nodes, each of which is connected with a plurality of the bus encoder modules through the industrial real-time bus and obtains the encoded sampling signals of the encoder sensors from the industrial real-time bus to perform processing operations based on the obtained encoded sampling signals. The system can meet the requirements of high-precision cooperation and deterministic control.

The application relates to the field of data detection and analysis, in particular to a bus encoder detection method and system, electronic equipment and a storage medium. The method comprises the following steps: obtaining a target communication data protocol package between a bus encoder and a servo driver, and adding the target communication data protocol package to a listening protocol package array; when the number of protocol packages in the listening protocol package array meets a preset number, sending the protocol packages in the listening protocol package array to a to-be-analyzed protocol package array; performing position analysis on the protocol packages in the to-be-analyzed protocol package array, and obtaining target position information corresponding to each protocol package; calculating a relative position change amount of adjacent positions according to a plurality of target position information; and based on the plurality of target position information, drawing a first curve for display, and according to the relative position change amount, drawing a second curve for display. The application can quantize the jitter range of the real-time relative position of the bus encoder, so as to ensure the production consistency of the bus encoder.

A general aircraft avionics cross-linking fault testing method for a 429 bus. The method comprises: collecting line information of an electromechanical information collection system of an aircraft by means of a test master console; connecting the test master console to interface ends of a remote data concentrator (RDC) by means of test cables without affecting the signal transmission of the aircraft, and effectively reading 429 bus information of the electromechanical information collection system; and parsing the read 429 bus information on the basis of a bipolar return-to-zero coding rule, comparing the 429 bus information with standard 429 bus code information, searching for differential code information, and positioning a faulty part by means of searching for a representative meaning of the differential code information, such that electromechanical information parameters are monitored in real time, signal analysis is performed and a fault point is effectively positioned. By using the method, a test master console can be connected to an RDC of an aircraft by taking the RDC as a port, and by means of the test master console, an output signal of a cross-linked system sensor can be collected in segments in real time, and whether the output signal is normal is analyzed.

The invention provides a control signal generation method and device, a readable storage medium and energy storage equipment, and relates to the technical field of digital signal modulation.The control signal generation method of a light emitting diode comprises the steps that first coding information is generated according to target light emitting information, and the target light emitting information comprises color information and brightness information; the first coding information is binary coding information; transcoding the first coding information to obtain second coding information, the second coding information being duplex synchronous serial bus coding information; and generating a control signal through the second coding information and the coding period, wherein the control signal is a duplex synchronous serial bus control signal.

The invention belongs to the field of integrated circuits, and discloses a self-adaptive 1553B bus encoding and decoding method supporting multiple rates, and the 1553B bus encoding method comprises the following steps: an encoder performs rate self-adaptive mode selection according to a CFG 3bit value of a three-bit mode configuration register, and the self-adaptive modes comprise two rate self-adaptive modes and three rate self-adaptive modes; the method comprises the following steps: acquiring decimal numbers of high 5 bits of a start message needing to be coded in two rate adaptive modes, and reading values of bits corresponding to the decimal numbers of a first group of 32-bit registers; if the value of the bit corresponding to the decimal number of the first group of 32-bit registers is 0, outputting a low-speed bus rate in the two rate adaptive modes, otherwise, outputting a high-speed bus rate in the two rate adaptive modes; the technical problems that in the prior art, transmission of 1553B buses with two or three different rates needs multiple devices and multiple sets of independent 1553B bus cables to meet the transmission requirement, the occupied PCB layout area is large, the system complexity is improved, cable resources are wasted, and power consumption is large are solved.

The invention relates to the field of data detection and analysis, in particular to a bus encoder detection method and system, electronic equipment and a storage medium. The method comprises the following steps: acquiring a target communication data protocol packet between a bus encoder and a servo driver, and adding the target communication data protocol packet into a monitoring protocol packet array; when the number of the protocol packets in the monitoring protocol packet array satisfies a preset number, sending the protocol packets in the monitoring protocol packet array to a protocol packet array to be analyzed; performing position analysis on the protocol packets in the to-be-analyzed protocol packet array to obtain target position information corresponding to each protocol packet; calculating the relative position variation of adjacent positions according to the continuous multiple pieces of target position information; and drawing a first curve for display based on the multiple pieces of target position information, and drawing a second curve for display according to the relative position variation. According to the invention, the jitter range of the real-time relative position of the bus encoder can be quantified, so that the production consistency of the bus encoder is ensured.