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Multiplier, data processing method and chip

A multiplier and data technology, applied in the computer field, can solve the problem of low versatility of the multiplier

Active Publication Date: 2021-11-30
SHANGHAI CAMBRICON INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, for low-bit-width data operations, existing multipliers that can handle high-bit-width data cannot be used for multiplication, resulting in low versatility of the multiplier

Method used

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  • Multiplier, data processing method and chip
  • Multiplier, data processing method and chip
  • Multiplier, data processing method and chip

Examples

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Embodiment Construction

[0068] In order to make the objects, technical solutions and advantages of the present application, the present application will be described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are intended to explain the present application and is not intended to limit the present application.

[0069] The multipliers provided herein can be applied to the AI ​​chip, field programmable gate array, FPGA chip, or other hardware circuit devices for multiplication, and specific structural schematic figure 1 with figure 2 Indicated.

[0070] like figure 1 A multiplier provided is a multiplier provided by an embodiment. like figure 1 As shown, the multiplier includes: correcting the Bus encoding circuit 11, a modified Wallace Tree Circuit 12, and a corrected accumulation circuit 13, the modified Wallace Tree circuit 12 includes a 4-2 compressor, the 4-2 compression The device includes a selectio...

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Abstract

The application provides a multiplier, a data processing method and a chip, the multiplier includes: a modified Booth coding circuit, a modified Wallace tree circuit and a modified accumulation circuit, the output terminal of the modified Booth coding circuit is connected to the The input end of the modified Wallace tree circuit is connected, the output end of the modified Wallace tree circuit is connected with the input end of the modified accumulation circuit, and the multiplier can perform multiplication operations on data with different bit widths, thereby improving the versatility of the multiplier.

Description

Technical field [0001] The present application relates to the field of computer technology, and in particular, to a multiplier, data processing method, and a chip. Background technique [0002] With the continuous development of digital electronic technology, the rapid development of all kinds of artificial intelligencers (AI) chips is also higher and higher in high performance digital multipliers. As one of the algorithms widely used by the intelligent chip, the neural network algorithm is used by multipliers to multiply in a neural network algorithm. [0003] Typically, multiplication operations of different bit wide data can be implemented in different bit wide existing multipliers. However, for low-wide data operations, multiplication can be used to process existing multipliers that can handle high wide data, resulting in a low versatility of the multiplier. Inventive content [0004] Based on this, it is necessary to provide a multiplier, data processing method, and chip ca...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/523G06N3/063
CPCG06F7/523G06N3/063
Inventor 不公告发明人
Owner SHANGHAI CAMBRICON INFORMATION TECH CO LTD
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