AHB bus test method and system

Abstract

The present invention discloses an AHB bus test method and system, applied in the test to the AHB bus in the system-on-chip (SOC), which is provided with AHB test interfaces. The method includes: producing first AHB bus signals at the exterior of the SOC; converting the first AHB bus signals into the test signals, and then transmits to the AHB test interface; the AHB test interface converting the received test signals into AHB bus transmission signals to execute AHB bus test. The AHB bus test system provided by the present invention at least includes a microprocessor for producing the first AHB bus transmission signals, as well as a test interface bus encoder for receiving the first AHB bus transmission signals and converting the signals into the test signals. The present invention can simply and exactly produce the test signals with high-efficiency, and can effectively realize the test to the AHB bus in the SOC.

Description

technical field [0001] The present invention relates to AHB (Advanced High-performance Bus, advanced high-performance bus) test method and system, relate in particular to the SOC (System-on-a-chip) based on AMBA (Advanced Microcontroller Bus Architecture, advanced microcontroller bus structure) AHB architecture , AHB bus testing method and system in system on chip). Background technique [0002] figure 1 It is a typical SOC based on the AMBAAHB architecture. It mainly includes AHB bus 1, high-performance microprocessor 2, on-chip high-bandwidth RAM (Random Access Memory) 3, high-bandwidth off-chip memory interface 4, high-performance DMA (Direct Memory Access) controller 5, APB (Advanced Peripheral Bus) bridge 6, APB bus 7 and APB slave 8. figure 1 The SOC architecture diagram in the figure is a known SOC architecture, and the functions of each part are also known. The high-performance microprocessor 2 is the control center of the entire SOC, and the high-bandwidth on-chi...

AI Technical Summary

Problems solved by technology

[0017] Disadvantage of method 1: too many SOC pins are required, even if only essential signals are mapped, mainly AHB clock signal, AHB address bus (32), AHB data bus (32), etc., there are as many as Sixty, more than seventy, not applicable to SOC with a small number of pins

[0018] Disadvantages of Method 2: According to the AMBA TIC protocol, the AHB test interface requires a total of 36 external interface signals, which are the test interface bus request signal TREQA, the test interface bus request signal TREQB, the test interface bus confirmation signal TACK, the test interface clock signal TCLK and Test interface bus TBUS[31:0]

For simple bus transmission, it can be generated by directly applying test stimuli. For complex bus transmission, if the method of directly applying test stimuli is not only heavy workload, low efficiency, but also extremely error-prone

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