Semiconductor packaging device and manufacturing method thereof
A packaging device, semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., to achieve the effect of improving the void phenomenon
Pending Publication Date: 2021-11-02
ADVANCED SEMICON ENG INC
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Problems solved by technology
[0002] At present, in the via holes of the fan-out redistribution layer, the copper plating process is mainly performed after sputtering the seed layer. However, when sputtering the seed layer, the thickness of the seed layer is generally about 2.5 microns to 3 microns. When the opening size is a small size (the small size in this disclosure is less than 60 microns, for example: 20 microns), the shoulder on the sidewall of the upper edge of the opening of the through hole, such as Figure 1A As shown by the dotted line in the middle, in the subsequent copper plating process, the plating on the shoulder has been completed but the inside of the through hole has not been completed, so the center of the copper pillar formed by the through hole will be as follows: Figure 1B The void phenomenon shown by the dotted line in the middle
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[0040] The specific implementation manners of the present disclosure will be described below in conjunction with the accompanying drawings and examples. Those skilled in the art can easily understand the technical problems solved by the present disclosure and the technical effects produced through the contents recorded in this specification. It should be understood that the specific embodiments described here are only used to explain related inventions, rather than to limit the invention. In addition, for the convenience of description, only the parts related to the related invention are shown in the drawings.
[0041] It should be noted that the structures, proportions, sizes, etc. shown in the accompanying drawings of the specification are only used to match the content recorded in the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present disclosure. There are limited conditions, so it has...
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Abstract
The invention relates to a semiconductor packaging device and a manufacturing method thereof. The semiconductor package device comprises: a substrate having a first surface; a circuit layer, which is arranged on the first surface and is provided with a second surface far away from the first surface; and a through hole, which realizes communication between the first surface and the second surface, wherein an opening is formed in the second surface, a first seed layer is arranged on the side wall of the through hole, a second seed layer is arranged on the second surface along the opening, the first seed layer and the second seed layer are connected at the opening, and the thickness of the first seed layer is larger than the thickness of the second seed layer. The shoulder projection height of the seed layer at the opening of the through hole can be reduced, and the problem of a void phenomenon generated in a copper plating process is further improved.
Description
technical field [0001] The present disclosure relates to the technical field of semiconductor packaging, in particular to a semiconductor packaging device and a manufacturing method thereof. Background technique [0002] At present, in the via holes of the fan-out redistribution layer, the copper plating process is mainly performed after sputtering the seed layer. However, when sputtering the seed layer, the thickness of the seed layer is generally about 2.5 microns to 3 microns. When the opening size is a small size (the small size in the present disclosure is less than 60 microns, for example: 20 microns), the shoulder on the sidewall of the upper edge of the opening of the through hole, such as Figure 1A As shown by the dotted line in the middle, in the subsequent copper plating process, the plating on the shoulder has been completed but the inside of the through hole has not been completed, so the center of the copper pillar formed by the through hole will be as follows:...
Claims
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IPC IPC(8): H01L23/498H01L23/528H01L21/48H01L21/768
CPCH01L23/49838H01L23/528H01L21/4846H01L21/76871H01L24/02H01L2221/1084H01L2224/02379
Inventor 黄文宏
Owner ADVANCED SEMICON ENG INC