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A cache-based memory access method and device

A technology for memory access and address access, which is applied in the field of Cache-based memory access methods and devices, can solve problems affecting processing efficiency and increase processing task delay, and achieve the effect of improving processing efficiency

Active Publication Date: 2022-03-25
BEIJING VCORE TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, when the replaced data is accessed again, it needs to go to the lower-level memory to perform corresponding memory access processing, resulting in an increase in the delay of the processing task and affecting the processing efficiency

Method used

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  • A cache-based memory access method and device
  • A cache-based memory access method and device
  • A cache-based memory access method and device

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Embodiment Construction

[0062] Embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the invention are shown in the drawings, it should be understood that the invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein; A more thorough and complete understanding of the present invention. It should be understood that the drawings and embodiments of the present invention are for exemplary purposes only, and are not intended to limit the protection scope of the present invention.

[0063] It should be understood that the various steps described in the method implementation manners of the present invention may be executed in different orders, and / or executed in parallel. Additionally, method embodiments may include additional steps and / or omit performing illustrated steps. The scope of the invention is not limited in this regard.

[0064]As used h...

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Abstract

The embodiment of the present invention provides a method and device for accessing memory based on Cache. The method includes: receiving a memory access instruction, where the memory access instruction is used to indicate an initial access address; obtaining a first index Index and a tag Tag of the initial access address; obtaining a second index Index according to the Tag and the first index Index; and obtaining a second index Index according to the second index Index , Tag and the block offset Block Offset of the initial access address to generate the target address; execute the memory access instruction on the position indicated by the target address. The solution provided by the invention can reduce the probability of conflicts and improve processing efficiency.

Description

technical field [0001] The present invention relates to the field of electronic technology, in particular to a method and device for accessing memory based on Cache. Background technique [0002] In the field of electronic technology, a computer device can determine an address for accessing a memory through a memory access instruction, and then read or write data from a physical address indicated by the address. [0003] When a computer processes a task, multiple data fetches may be involved. At this time, the storage locations of each data in the Cache will be concentrated in one area, making the probability of storage conflicts higher. When a storage conflict occurs, the current data needs to be replaced for storage. For example, in the operation of multiple arrays, the high-order addresses of these arrays are different, but the low-order addresses are the same. Since the Index of the Cache takes the low-order address of the memory access address and does not reflect the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/06
CPCG06F12/06
Inventor 李祖松郇丹丹
Owner BEIJING VCORE TECH CO LTD
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