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Patterned buried insulator

A body, transistor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as missing isolation, excessive consumption of silicon area, etc.

Inactive Publication Date: 2005-11-16
INFINEON TECH AG +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Extensive efforts have been made in different schemes of body contact formation to try to alleviate these problems, but the problem still exists, usually the excessive consumption of silicon area
[0004] It has been proposed to pattern implant oxygen ions and subject the wafer to a high temperature anneal, but this still has additional cost issues associated with high dose implants and missing isolation, and oxygen precipitation from the device area

Method used

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  • Patterned buried insulator
  • Patterned buried insulator
  • Patterned buried insulator

Examples

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Embodiment Construction

[0012] refer to figure 1 , shows a cross-sectional view of an integrated circuit, wherein the P-type substrate 10 has a deposited pad nitrogen / oxide layer 15, the circuit is patterned with a resist 18 on the area that will become the body of the transistor, and then dopant Implants, such as boron or phosphorous, form area 32 below transistor 20 for the source / drain regions of the transistor. The depth of implantation is set by the transistor designer as desired. If a thicker buried layer is desired without the natural dispersion of the implant, the implant voltage will be varied to produce the desired thickness. The type of dopant is not critical as long as it allows the silicon to etch easily. Boron can be used to form a P + area, phosphorus can constitute n + Area.

[0013] figure 2 The same area is shown after stripping the resist, patterning a new layer of resist to define shallow trench isolations (STIs), and etching the STIs in conventional directional reactive i...

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PUM

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Abstract

A patterned buried insulator is formed beneath the source and drain by forming a mask over the body area and implanting a dose of n or p type ions in the areas where the source and drains will be formed, then etching the STI and etching out the implanted area. A light oxidation is followed by a conformal oxide deposition in the STI and also in the etched area, thereby forming the buried oxide only where desired.

Description

technical field [0001] The scope of the invention is to form integrated circuits with buried insulators, such as oxides, formed in selected areas. Background technique [0002] The advantages of circuits with buried oxide are well known, the problems associated with having transistor bodies isolated from the substrate, and the additional costs associated with the long time required to perform implantation are well known. [0003] Extensive efforts have been made in various schemes in body contact formation to try to alleviate these problems, but problems still remain, usually overconsumption of silicon area. [0004] It has been proposed to pattern implant oxygen ions and subject the wafer to a high temperature anneal, but this still has additional cost issues associated with high dose implants and defect isolation, and oxygen precipitation from the device area. Contents of the invention [0005] The present invention relates to integrated circuits having buried insulator...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762H01L21/8234H01L29/06
CPCH01L21/823481H01L29/0653H01L21/823418H01L21/7624H01L21/76224H01L21/7621
Inventor B·A·陈A·赫希S·K·艾耶N·罗维多H·-J·沃恩张英
Owner INFINEON TECH AG