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Storage address decoding method and related apparatus conducted in bit-mode match

A technology of memory address and decoding method, which is applied in the field of address decoding of storage devices, and can solve the problems that the efficiency of computer 10 cannot be effectively improved, the efficiency is low, and the storage module cannot be quickly decoded.

Inactive Publication Date: 2005-12-14
VIA TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The characteristics of the above-mentioned addition operation time consumption will be directly reflected in the existing technology; when image 3 In the prior art, when the subtraction operation carried out by the subtraction module is used to compare the size relationship between the given address 54 and each end address 46A to 46D, it will consume a considerable amount of time on the subtraction operation, and cause the existing control circuit 28 The efficiency of preliminary address decoding is low, and it is impossible to quickly decode the memory module to which a given address belongs
Once the efficiency of address decoding is low, the central processing unit 12 (see figure 1 ) will not be able to access the storage resources of the storage device 16 quickly and efficiently, so that the efficiency of the operation of the entire computer 10 cannot be effectively improved

Method used

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  • Storage address decoding method and related apparatus conducted in bit-mode match
  • Storage address decoding method and related apparatus conducted in bit-mode match
  • Storage address decoding method and related apparatus conducted in bit-mode match

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Embodiment Construction

[0052] Please refer to Figure 4 . Figure 4 It is a functional block diagram of the computer 60 in the present invention. Computer 60 is as a microprocessor system, and it is provided with a central processing unit 62 , a chipset 64 , a storage device 66 , a display card 68 , a display 70 , a peripheral device 72 and a basic input / output system 74 . The central processing unit 62 is used to control the operation of the computer 60, and the storage device 66 is used to temporarily store the programs and data required during the operation of the central processing unit 62 in a volatile manner; the display card 68 is used to process image signals to make the computer The running situation of 60 is displayed on the display 70 with a graphic picture. The peripheral device 72 may include a keyboard for the user to input manipulation commands, a mouse, a hard disk drive for storing data in a non-volatile manner, a CD drive, a sound card for processing sound signals, or for connect...

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Abstract

The present invention relates to a memory address decoding method and related device to judge which section of the memory a given address is located in. The storage device is provided with a plurality of sections, each section is provided with a plurality of storage units, and each storage unit has a corresponding address. And the method is to compare whether some bits in the given address conform to any bit pattern, so as to determine which segment in the memory the given address belongs to.

Description

technical field [0001] The present invention relates to a storage device address decoding method and a related device, in particular to a method and a related device for rapidly performing address decoding by bit pattern comparison. Background technique [0002] In a modern society, a microprocessor system that can quickly process and manage various digital data, files, data and audio-visual information has become one of the most important basic equipment for the information society. Generally speaking, in order to realize various complex and diversified functions, the microprocessor system will set up a temporary data storage device (such as a random access memory) to temporarily store the programs and data required during the operation of the microprocessor. . The microprocessor reads and executes the programs and data temporarily stored in the storage device, and can control the microprocessor system to complete various functions. Therefore, the speed and efficiency wit...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/38G06F12/06
Inventor 蔡日兴
Owner VIA TECH INC