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A micro-dispatching method supporting directed cyclic graph

A directed ring graph and scheduling method technology, applied in program control design, instrumentation, electrical and digital data processing, etc., can solve the problems of reducing compilation and optimization performance, reducing compilation efficiency, and reducing running time, and improving compilation and optimization performance. , the effect of improving the efficiency of parallel compilation and reducing the possibility

Active Publication Date: 2007-03-21
HANGZHOU HEZHONG DATA TECH CO LTD
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When the basic block (BB: Basic Block) where these instruction sets are located is executed very frequently, and these instruction sets are repeated in the basic block due to SWP loop unrolling (Loop unrolling), it will significantly affect Compile optimized performance
It is also this example that directly caused the running time of bzip2 (ISET=ref) in SPEC2000 to drop by about 2% after compiling under the ORC peak option.
[0025] To sum up, in the modular scheduling of software pipelining in the prior art, there will be splitting problems, which will also increase the possibility of instruction cache access misses, reduce compilation efficiency, and thus reduce the performance of compilation optimization

Method used

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  • A micro-dispatching method supporting directed cyclic graph
  • A micro-dispatching method supporting directed cyclic graph
  • A micro-dispatching method supporting directed cyclic graph

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Embodiment Construction

[0070] As mentioned above, modular scheduling belongs to the Move-then-scheduling technology, which is a movement instruction across the back-edge of the loop. The "Data Dependence Graph" (DDG: Data Dependence Graph) it builds is different from the traditional " Directed Acyclic Graph" (DAG: Directed Acyclic Graph), but a "Directed Cyclic Graph" (DCG: Directed Cyclic Graph).

[0071] It not only includes the dependencies between instructions of the same iteration (iteration) in the loop, but also includes the loop-carried dependencies between different iterations. It is the latter, by looping back to the edge (if every path from the initial node of the DDG to node a goes through node b, then node b is said to dominate node a (b dom a). If b dom a, then the edge a → b is called "back edge". As shown in Figure 1c, node 1 points to its own back edge), turning the traditional DAG into a "directed and cyclic graph" [Vicki H.Allan, Reese B. Jones, Randall M . Lee, Stephen J. Allan....

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Abstract

This invention relates to micro adjusting method with supportive ring graph, which uses recorder technique and neachievediate technique mode and considers not only the relationship between orders and also delay value of the orders arc and the order degree when in the same one order aggregation to realize the loop support.

Description

technical field [0001] The invention relates to the technical field of instruction-level parallel compilation and micro-scheduling, in particular to a micro-scheduling method supporting a "directed and cyclic graph" with "back edges", and a corresponding compilation optimization technology. Background technique [0002] Instruction scheduling is an important stage of machine-dependent optimization. Successful instruction scheduling needs to meet data-related, control-related, structure-related and other constraints, and improve resource utilization and instruction parallelism by rearranging the order of instructions. Among them, structure-related refers to resource conflicts that may occur if instructions are executed in parallel. To solve this kind of correlation, it is necessary to access the status of occupied resources, access the machine state, obtain the delay between instructions, etc., so frequent access to the machine model is required [Muchnick.Advance Compiler De...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/45
Inventor 文严治连瑞琦刘章林吴承勇张兆庆
Owner HANGZHOU HEZHONG DATA TECH CO LTD