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Flip-chip bonding package structure of chip

A flip-chip packaging and chip technology, used in electrical components, electrical solid-state devices, circuits, etc., to solve problems such as decreased reliability of solder joints

Inactive Publication Date: 2004-07-14
ASE ASSEMBLY & TEST SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The shortcoming of this kind of flip-chip welding is that: the shape of the solder joint 131 on the chip 130 and the shape of the pad 101 on the substrate layer 100 are mostly in the shape of a circle, and no matter the solder joint or the solder joint at the central position or the edge position Disks, which are uniform in shape and size
However, due to the different thermal expansion coefficients of the chip 130 and the organic substrate layer 100, the reliability of the solder joints decreases due to thermal mismatch during the manufacturing process and operation of the device.

Method used

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Embodiment Construction

[0022] The overall packaging structure of the present invention is basically the same as the traditional one, including a chip and a substrate, and there are multiple solder joints on the chip, generally in an array. Correspondingly, the substrate also has a plurality of pads, also in an array. The pads on the chip and the pads on the substrate are soldered together by a conventional soldering process.

[0023] The improvement of the present invention lies in that the shapes of the solder joints on the chip and the solder pads on the substrate are improved. FIG. 3 schematically shows the shapes and distribution of solder points and pads on several chips and substrates. As can be seen from the figures in Fig. 3, the main improvement points of the present invention to the solder joints of the chip and the substrate and the solder pads are to make the shape of the solder joints of the chip gradually expand from the center to the outside, and the shape of the solder pads on the s...

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Abstract

This invention relates to a flip-chip bonding packaging structure including a chip and a baseplate, the welding points on the chip are corresponding to the welding disks on the baseplate and welded together characterizing that the shapes of the chip welding points are expanded steadily from the center to outside and shapes of the disks are expanded from center to outside coherently, the surrounding welding points of the chip are rectangular, same with the extending line radially from the center to outside and shapes of the surrounding disks are rectangular same with the extension line radially from center to outside, their shape can be elliptic.

Description

technical field [0001] The invention relates to integrated circuit packaging technology, in particular to a chip flip-chip packaging structure. Background technique [0002] The flip chip (Flip Chip) process is an advanced packaging technology used to replace the commonly used wire bonding (wire bonding) process for chip and external electrical interconnection. Its advantage lies in its good electrical performance, which is suitable for the application of high-speed and high-density electronic devices. Figure 1 shows the flow chart of this flip chip technology. [0003] As shown in Figure 1, the general flow of the flip chip technology is: [0004] On the side of the substrate layer 100 to the pad 101, the flux is dripped through the drip nozzle 110 to form a flux layer 120 on the surface of the substrate layer 100; (as shown in Figure 1A) [0005] Then, the chip 130 to be packaged is turned upside down on the substrate layer 100, so that the solder joints 131 on the chip...

Claims

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Application Information

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IPC IPC(8): H01L21/28H01L21/60H01L21/768H01L23/48
CPCH01L2224/83192H01L2224/16225H01L2224/73204H01L24/81H01L2224/32225H01L2924/14
Inventor 杜黎光
Owner ASE ASSEMBLY & TEST SHANGHAI